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7198185e3a
Now that the armvirt target supports real hardware, not just
VMs, thanks to the addition of EFI, rename it to something
more appropriate.
'armsr' (Arm SystemReady) was chosen after the name of
the Arm standards program.
The 32 and 64 bit targets have also been renamed
armv7 and armv8 respectively, to allow future profiles
where required (such as armv9).
See https://developer.arm.com/documentation/102858/0100/Introduction
for more information.
Signed-off-by: Mathew McBride <matt@traverse.com.au>
(23.05 version of commit 40b02a2301)
35 lines
1.4 KiB
Diff
35 lines
1.4 KiB
Diff
From c314138bd045e050432158ab021160de3ba51c5e Mon Sep 17 00:00:00 2001
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From: Russell King <rmk+kernel@armlinux.org.uk>
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Date: Thu, 30 Jan 2020 22:42:38 +0000
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Subject: [PATCH 2/4] net: dpaa2-mac: add support for more 10G modes
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Phylink documentation says:
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* Note that the PHY may be able to transform from one connection
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* technology to another, so, eg, don't clear 1000BaseX just
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* because the MAC is unable to BaseX mode. This is more about
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* clearing unsupported speeds and duplex settings. The port modes
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* should not be cleared; phylink_set_port_modes() will help with this.
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So add the missing 10G modes.
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Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
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---
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drivers/net/ethernet/freescale/dpaa2/dpaa2-mac.c | 6 ++++++
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1 file changed, 6 insertions(+)
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--- a/drivers/net/ethernet/freescale/dpaa2/dpaa2-mac.c
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+++ b/drivers/net/ethernet/freescale/dpaa2/dpaa2-mac.c
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@@ -140,6 +140,12 @@ static void dpaa2_mac_validate(struct ph
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case PHY_INTERFACE_MODE_10GBASER:
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case PHY_INTERFACE_MODE_USXGMII:
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phylink_set(mask, 10000baseT_Full);
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+ phylink_set(mask, 10000baseKR_Full);
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+ phylink_set(mask, 10000baseCR_Full);
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+ phylink_set(mask, 10000baseSR_Full);
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+ phylink_set(mask, 10000baseLR_Full);
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+ phylink_set(mask, 10000baseLRM_Full);
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+ phylink_set(mask, 10000baseER_Full);
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if (state->interface == PHY_INTERFACE_MODE_10GBASER)
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break;
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phylink_set(mask, 5000baseT_Full);
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