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05ed7dc50d
Patches automatically rebased. Signed-off-by: Rui Salvaterra <rsalvaterra@gmail.com>
81 lines
3.0 KiB
Diff
81 lines
3.0 KiB
Diff
From aebb741058a63c3493f4139d11d6f290d5691e9b Mon Sep 17 00:00:00 2001
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From: Eugen Hristev <eugen.hristev@microchip.com>
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Date: Tue, 13 Apr 2021 12:57:09 +0200
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Subject: [PATCH 167/247] media: atmel: atmel-isc: add SUB422 and SUB420 to
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register offsets
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The SUB submodules are a part of the atmel-isc pipeline, and stand for
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Subsampling. They are used to subsample the original YUV 4:4:4 pixel ratio
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aspect to either 4:2:2 or 4:2:0.
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Add sub420 and sub422 to the reg offsets struct.
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This will allow different products to have a different reg offset for these
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particular modules.
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Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
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Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl>
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Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
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---
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drivers/media/platform/atmel/atmel-isc-base.c | 4 ++--
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drivers/media/platform/atmel/atmel-isc-regs.h | 4 ++++
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drivers/media/platform/atmel/atmel-isc.h | 4 ++++
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drivers/media/platform/atmel/atmel-sama5d2-isc.c | 2 ++
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4 files changed, 12 insertions(+), 2 deletions(-)
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--- a/drivers/media/platform/atmel/atmel-isc-base.c
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+++ b/drivers/media/platform/atmel/atmel-isc-base.c
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@@ -2326,8 +2326,8 @@ int isc_pipeline_init(struct isc_device
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REG_FIELD(ISC_GAM_CTRL, 3, 3),
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REG_FIELD(ISC_CSC_CTRL + isc->offsets.csc, 0, 0),
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REG_FIELD(ISC_CBC_CTRL + isc->offsets.cbc, 0, 0),
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- REG_FIELD(ISC_SUB422_CTRL, 0, 0),
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- REG_FIELD(ISC_SUB420_CTRL, 0, 0),
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+ REG_FIELD(ISC_SUB422_CTRL + isc->offsets.sub422, 0, 0),
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+ REG_FIELD(ISC_SUB420_CTRL + isc->offsets.sub420, 0, 0),
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};
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for (i = 0; i < ISC_PIPE_LINE_NODE_NUM; i++) {
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--- a/drivers/media/platform/atmel/atmel-isc-regs.h
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+++ b/drivers/media/platform/atmel/atmel-isc-regs.h
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@@ -194,9 +194,13 @@
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#define ISC_CBC_CONTRAST 0x000003c0
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#define ISC_CBC_CONTRAST_MASK GENMASK(11, 0)
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+/* Offset for SUB422 register specific to sama5d2 product */
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+#define ISC_SAMA5D2_SUB422_OFFSET 0
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/* Subsampling 4:4:4 to 4:2:2 Control Register */
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#define ISC_SUB422_CTRL 0x000003c4
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+/* Offset for SUB420 register specific to sama5d2 product */
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+#define ISC_SAMA5D2_SUB420_OFFSET 0
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/* Subsampling 4:2:2 to 4:2:0 Control Register */
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#define ISC_SUB420_CTRL 0x000003cc
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--- a/drivers/media/platform/atmel/atmel-isc.h
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+++ b/drivers/media/platform/atmel/atmel-isc.h
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@@ -147,10 +147,14 @@ struct isc_ctrls {
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* struct isc_reg_offsets - ISC device register offsets
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* @csc: Offset for the CSC register
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* @cbc: Offset for the CBC register
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+ * @sub422: Offset for the SUB422 register
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+ * @sub420: Offset for the SUB420 register
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*/
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struct isc_reg_offsets {
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u32 csc;
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u32 cbc;
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+ u32 sub422;
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+ u32 sub420;
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};
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/*
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--- a/drivers/media/platform/atmel/atmel-sama5d2-isc.c
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+++ b/drivers/media/platform/atmel/atmel-sama5d2-isc.c
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@@ -253,6 +253,8 @@ static int atmel_isc_probe(struct platfo
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isc->offsets.csc = ISC_SAMA5D2_CSC_OFFSET;
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isc->offsets.cbc = ISC_SAMA5D2_CBC_OFFSET;
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+ isc->offsets.sub422 = ISC_SAMA5D2_SUB422_OFFSET;
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+ isc->offsets.sub420 = ISC_SAMA5D2_SUB420_OFFSET;
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/* sama5d2-isc - 8 bits per beat */
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isc->dcfg = ISC_DCFG_YMBSIZE_BEATS8 | ISC_DCFG_CMBSIZE_BEATS8;
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