mirror of
https://github.com/openwrt/openwrt.git
synced 2024-12-28 01:28:59 +00:00
50f7c5af4a
Update to next U-Boot timed release. Remove now obsolete patch 100-01-board-mediatek-add-more-network-configurations.patch Default IP addresses are now dealt with in Kconfig, no longer in board- specific C header files. Add patches to restore ANSI support in bootmenu which was broken upstream, always use high-speed mode on serial UART for improved stability and fix an issue with pinconf not being applied on MT7623 resulting in eMMC being inaccessible when booting from micro SD card. In order to keep the size of the bootloader on MT7623 below 512kB remove some unneeded commands on both MT7623 boards. Tested on: * BananaPi BPi-R2 (MT7623N) * BananaPi BPi-R3 (MT7986A) * BananaPi BPi-R64 (MT7622A) * Linksys E8450 (MT7622B) Signed-off-by: Daniel Golle <daniel@makrotopia.org>
44 lines
1.2 KiB
Diff
44 lines
1.2 KiB
Diff
From 19f2aa053d5531a9ca0ece04dca172a522d58b90 Mon Sep 17 00:00:00 2001
|
|
From: Weijie Gao <weijie.gao@mediatek.com>
|
|
Date: Fri, 29 Jul 2022 11:32:28 +0800
|
|
Subject: [PATCH 32/71] clk: remove log_ret from clk_get_rate
|
|
|
|
The return value of clk_get_rate is ulong, an unsigned type. The size of
|
|
ulong depends on the cpu architecture, i.e. 4 bytes on 32-bit CPUs and
|
|
8 bytes on 64-bit CPUs.
|
|
|
|
However log_ret only accepts and returns value in int type, a fixed 4-byte
|
|
type. This may truncate the real clock value and cause unexpected error on
|
|
64-bit platforms.
|
|
|
|
This patch removes log_ret to solve this issue.
|
|
|
|
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
|
|
---
|
|
drivers/clk/clk-uclass.c | 7 +------
|
|
1 file changed, 1 insertion(+), 6 deletions(-)
|
|
|
|
--- a/drivers/clk/clk-uclass.c
|
|
+++ b/drivers/clk/clk-uclass.c
|
|
@@ -471,7 +471,6 @@ void clk_free(struct clk *clk)
|
|
ulong clk_get_rate(struct clk *clk)
|
|
{
|
|
const struct clk_ops *ops;
|
|
- int ret;
|
|
|
|
debug("%s(clk=%p)\n", __func__, clk);
|
|
if (!clk_valid(clk))
|
|
@@ -481,11 +480,7 @@ ulong clk_get_rate(struct clk *clk)
|
|
if (!ops->get_rate)
|
|
return -ENOSYS;
|
|
|
|
- ret = ops->get_rate(clk);
|
|
- if (ret)
|
|
- return log_ret(ret);
|
|
-
|
|
- return 0;
|
|
+ return ops->get_rate(clk);
|
|
}
|
|
|
|
struct clk *clk_get_parent(struct clk *clk)
|