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7181eb9f81
Remove upstreamed patches: - 000-v5.18-01-dt-bindings-reset-add-dt-binding-header-for-Mediatek.patch - 000-v5.18-02-staging-mt7621-dts-align-resets-with-binding-documen.patch - 001-v5.18-01-dt-bindings-clock-mediatek-mt7621-sysc-add-reset-cel.patch - 001-v5.18-02-clk-ralink-make-system-controller-node-a-reset-provi.patch - 002-v6.0-MIPS-ralink-mt7621-avoid-to-init-common-ralink-reset.patch - 100-v5.16-PCI-mt7621-Add-MediaTek-MT7621-PCIe-host-controller-.patch - 101-v5.17-PCI-mt7621-Rename-mt7621_pci_-to-mt7621_pcie_.patch - 102-v5.17-PCI-mt7621-Declare-mt7621_pci_ops-static.patch - 103-v5.17-PCI-mt7621-Move-MIPS-setup-to-pcibios_root_bridge_pr.patch - 104-v5.17-PCI-mt7621-Drop-of_match_ptr-to-avoid-unused-variabl.patch - 105-v5.17-PCI-mt7621-Remove-unused-function-pcie_rmw.patch - 106-v5.17-PCI-Let-pcibios_root_bridge_prepare-access-bridge-wi.patch - 107-v6.2-PCI-mt7621-Add-sentinel-to-quirks-table.patch - 108-v6.3-PCI-mt7621-Delay-phy-ports-initialization.patch Manually refresh: - 006-v6.5-mips-ralink-introduce-commonly-used-remap-node-funct.patch - 320-MIPS-add-support-for-buggy-MT7621S-core-detection.patch - 405-mtd-spi-nor-Add-support-for-BoHong-bh25q128as.patch - 410-mtd-rawnand-add-driver-support-for-MT7621-nand-flash.patch - 805-pinctrl-AW9523.patch - 825-i2c-MIPS-adds-ralink-I2C-driver.patch - 830-mmc-MIPS-ralink-add-sdhci-for-mt7620a-SoC.patch Automatically refresh: - 200-add-ralink-eth.patch - 314-MIPS-add-bootargs-override-property.patch - 315-owrt-hack-fix-mt7688-cache-issue.patch - 700-net-ethernet-mediatek-support-net-labels.patch - 720-Revert-net-phy-simplify-phy_link_change-arguments.patch - 721-NET-no-auto-carrier-off-support.patch - 800-dmaengine-mediatek-add-HSDMA-support-for-mt7621.patch - 802-GPIO-MIPS-ralink-add-gpio-driver-for-ralink-SoC.patch - 810-uvc-add-iPassion-iP2970-support.patch - 821-SPI-ralink-add-Ralink-SoC-spi-driver.patch - 835-asoc-add-mt7620-support.patch - 840-serial-add-ugly-custom-baud-rate-hack.patch - 845-pwm-add-mediatek-support.patch - 850-awake-rt305x-dwc2-controller.patch Tested-by: Andre Heider <a.heider@gmail.com> # netgear,wac124 Tested-by: Andrey Jr. Melnikov <temnota.am@gmail.com> # Xiaomi Mi Router 3G Tested-by: Timo Dorfner <timo.capa@gmail.com> # mt7621/mir3g mt7621/rm2100 Reviewed-by: Shiji Yang <yangshiji66@qq.com> Co-Developed-by: Mieczyslaw Nalewaj <namiltd@yahoo.com> Signed-off-by: Nick Hainke <vincent@systemli.org>
122 lines
3.2 KiB
Diff
122 lines
3.2 KiB
Diff
From 201ddc05777cd8e084b508bcdda22214bfe2895e Mon Sep 17 00:00:00 2001
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From: Sergio Paracuellos <sergio.paracuellos@gmail.com>
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Date: Mon, 19 Jun 2023 06:09:39 +0200
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Subject: [PATCH 7/9] mips: ralink: remove reset related code
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A proper clock driver for ralink SoCs has been added. This driver is also
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a reset provider for the SoC. Hence there is no need to have reset related
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code in 'arch/mips/ralink' folder anymore. The only code that remains is
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the one related with mips_reboot_setup where a PCI reset is performed.
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We maintain this because I cannot test old ralink board with PCI to be
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sure all works if we remove also this code.
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Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
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Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
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---
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arch/mips/ralink/common.h | 2 --
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arch/mips/ralink/of.c | 4 ----
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arch/mips/ralink/reset.c | 61 -----------------------------------------------
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3 files changed, 67 deletions(-)
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--- a/arch/mips/ralink/common.h
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+++ b/arch/mips/ralink/common.h
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@@ -23,8 +23,6 @@ extern struct ralink_soc_info soc_info;
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extern void ralink_of_remap(void);
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-extern void ralink_rst_init(void);
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-
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extern void __init prom_soc_init(struct ralink_soc_info *soc_info);
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__iomem void *plat_of_remap_node(const char *node);
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--- a/arch/mips/ralink/of.c
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+++ b/arch/mips/ralink/of.c
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@@ -81,10 +81,6 @@ static int __init plat_of_setup(void)
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{
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__dt_register_buses(soc_info.compatible, "palmbus");
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- /* make sure that the reset controller is setup early */
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- if (ralink_soc != MT762X_SOC_MT7621AT)
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- ralink_rst_init();
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-
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return 0;
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}
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--- a/arch/mips/ralink/reset.c
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+++ b/arch/mips/ralink/reset.c
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@@ -10,7 +10,6 @@
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#include <linux/io.h>
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#include <linux/of.h>
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#include <linux/delay.h>
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-#include <linux/reset-controller.h>
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#include <asm/reboot.h>
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@@ -22,66 +21,6 @@
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#define RSTCTL_RESET_PCI BIT(26)
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#define RSTCTL_RESET_SYSTEM BIT(0)
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-static int ralink_assert_device(struct reset_controller_dev *rcdev,
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- unsigned long id)
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-{
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- u32 val;
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-
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- if (id == 0)
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- return -1;
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-
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- val = rt_sysc_r32(SYSC_REG_RESET_CTRL);
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- val |= BIT(id);
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- rt_sysc_w32(val, SYSC_REG_RESET_CTRL);
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-
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- return 0;
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-}
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-
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-static int ralink_deassert_device(struct reset_controller_dev *rcdev,
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- unsigned long id)
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-{
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- u32 val;
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-
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- if (id == 0)
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- return -1;
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-
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- val = rt_sysc_r32(SYSC_REG_RESET_CTRL);
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- val &= ~BIT(id);
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- rt_sysc_w32(val, SYSC_REG_RESET_CTRL);
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-
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- return 0;
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-}
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-
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-static int ralink_reset_device(struct reset_controller_dev *rcdev,
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- unsigned long id)
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-{
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- ralink_assert_device(rcdev, id);
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- return ralink_deassert_device(rcdev, id);
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-}
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-
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-static const struct reset_control_ops reset_ops = {
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- .reset = ralink_reset_device,
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- .assert = ralink_assert_device,
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- .deassert = ralink_deassert_device,
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-};
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-
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-static struct reset_controller_dev reset_dev = {
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- .ops = &reset_ops,
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- .owner = THIS_MODULE,
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- .nr_resets = 32,
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- .of_reset_n_cells = 1,
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-};
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-
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-void ralink_rst_init(void)
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-{
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- reset_dev.of_node = of_find_compatible_node(NULL, NULL,
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- "ralink,rt2880-reset");
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- if (!reset_dev.of_node)
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- pr_err("Failed to find reset controller node");
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- else
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- reset_controller_register(&reset_dev);
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-}
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-
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static void ralink_restart(char *command)
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{
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if (IS_ENABLED(CONFIG_PCI)) {
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