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2e715fb4fc
Add support for BCM2712 (Raspberry Pi 5).
3bb5880ab3
Patches were generated from the diff between linux kernel branch linux-6.1.y
and rpi-6.1.y from raspberry pi kernel source:
- git format-patch linux-6.1.y...rpi-6.1.y
Build system: x86_64
Build-tested: bcm2708, bcm2709, bcm2710, bcm2711
Run-tested: bcm2710/RPi3B, bcm2711/RPi4B
Signed-off-by: Marty Jones <mj8263788@gmail.com>
[Remove applied and reverted patches, squash patches and config commits]
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
58 lines
2.2 KiB
Diff
58 lines
2.2 KiB
Diff
From a671a2774cb3bcfb144622149757f6821aa0604c Mon Sep 17 00:00:00 2001
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From: Maxime Ripard <maxime@cerno.tech>
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Date: Thu, 13 Apr 2023 16:52:19 +0200
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Subject: [PATCH] dmaengine: bcm2835: HACK: Support DMA-Lite channels
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The BCM2712 has a DMA-Lite controller that is basically a BCM2835-style
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DMA controller that supports 40 bits DMA addresses.
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We need it for HDMI audio to work, but this breaks BCM2835-38 so we
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should rework this later.
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Signed-off-by: Maxime Ripard <maxime@cerno.tech>
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---
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drivers/dma/bcm2835-dma.c | 11 +++++++----
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1 file changed, 7 insertions(+), 4 deletions(-)
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--- a/drivers/dma/bcm2835-dma.c
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+++ b/drivers/dma/bcm2835-dma.c
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@@ -550,7 +550,7 @@ static struct bcm2835_desc *bcm2835_dma_
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control_block->info = info;
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control_block->src = src;
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control_block->dst = dst;
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- control_block->stride = 0;
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+ control_block->stride = (upper_32_bits(dst) << 8) | upper_32_bits(src);
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control_block->next = 0;
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}
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@@ -575,7 +575,7 @@ static struct bcm2835_desc *bcm2835_dma_
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d->cb_list[frame - 1].cb)->next_cb =
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to_bcm2711_cbaddr(cb_entry->paddr);
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if (frame && !c->is_40bit_channel)
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- d->cb_list[frame - 1].cb->next = cb_entry->paddr;
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+ d->cb_list[frame - 1].cb->next = to_bcm2711_cbaddr(cb_entry->paddr);
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/* update src and dst and length */
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if (src && (info & BCM2835_DMA_S_INC)) {
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@@ -760,7 +760,10 @@ static void bcm2835_dma_start_desc(struc
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writel(BCM2711_DMA40_ACTIVE | BCM2711_DMA40_PROT | BCM2711_DMA40_CS_FLAGS(c->dreq),
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c->chan_base + BCM2711_DMA40_CS);
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} else {
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- writel(d->cb_list[0].paddr, c->chan_base + BCM2835_DMA_ADDR);
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+ writel(BIT(31), c->chan_base + BCM2835_DMA_CS);
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+
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+ writel(to_bcm2711_cbaddr(d->cb_list[0].paddr),
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+ c->chan_base + BCM2835_DMA_ADDR);
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writel(BCM2835_DMA_ACTIVE | BCM2835_DMA_CS_FLAGS(c->dreq),
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c->chan_base + BCM2835_DMA_CS);
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}
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@@ -1129,7 +1132,7 @@ static struct dma_async_tx_descriptor *b
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d->cb_list[frames - 1].cb)->next_cb =
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to_bcm2711_cbaddr(d->cb_list[0].paddr);
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else
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- d->cb_list[d->frames - 1].cb->next = d->cb_list[0].paddr;
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+ d->cb_list[d->frames - 1].cb->next = to_bcm2711_cbaddr(d->cb_list[0].paddr);
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return vchan_tx_prep(&c->vc, &d->vd, flags);
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}
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