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da8b720b0e
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
48 lines
1.6 KiB
Diff
48 lines
1.6 KiB
Diff
From 33826e9c6ba76b265d4e26cb95493fa27ed78974 Mon Sep 17 00:00:00 2001
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From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
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Date: Wed, 29 Dec 2021 11:23:14 +0100
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Subject: [PATCH] arm64: dts: broadcom: bcm4908: use proper TWD binding
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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Block at <ff800400 0x4c> is a TWD that contains timers, watchdog and
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reset. Actual timers happen to be at block beginning but they only span
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across the first 0x28 registers. It means the old block description was
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incorrect (size 0x3c).
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Drop timers binding for now and use documented TWD binding. Timers
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should be properly documented and defined as TWD subnode.
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Fixes: 2961f69f151c ("arm64: dts: broadcom: add BCM4908 and Asus GT-AC5300 early DTS files")
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Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
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Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
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---
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arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi | 8 ++++----
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1 file changed, 4 insertions(+), 4 deletions(-)
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--- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi
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+++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi
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@@ -273,9 +273,9 @@
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#size-cells = <1>;
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ranges = <0x00 0x00 0xff800000 0x3000>;
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- timer: timer@400 {
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- compatible = "brcm,bcm6328-timer", "syscon";
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- reg = <0x400 0x3c>;
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+ twd: timer-mfd@400 {
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+ compatible = "brcm,bcm4908-twd", "simple-mfd", "syscon";
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+ reg = <0x400 0x4c>;
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};
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gpio0: gpio-controller@500 {
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@@ -330,7 +330,7 @@
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reboot {
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compatible = "syscon-reboot";
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- regmap = <&timer>;
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+ regmap = <&twd>;
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offset = <0x34>;
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mask = <1>;
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};
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