openwrt/target/linux/ramips/dts/WIZFI630A.dts
John Crispin 6801c4e33e ramips: HLK-RM04 - Enable GPIO14 for WPS button
The top half of UARTF on the HLK-RM04 is used for GPIO.

  mode 1   mode 2
   RIN     GPIO14
   DSR_N   GPIO13
   DCD_N   GPIO12
   DTR_N   GPIO11
   RXD     GPIO10
   CTS_N   GPIO09
   TXD     GPIO08
   RTS_N   GPIO07

This patch applies 3'b101 mode to UARTF:

   GPIO14
   GPIO13
   GPIO12
   GPIO11
   RXD
   CTS_N
   TXD
   RTS_N

Because the base rt5350.dtsi file forces 3'b000 mode, remove the pin setting from this file and apply it directly to the files that inherit from it (WIZFI630A.dts and WT1520.dtsi).  This change makes the rt5350.dtsi file consistent with the mt7620a.dtsi file.

Signed-off-by: John Clark <inindev@gmail.com>

SVN-Revision: 48665
2016-02-08 08:26:27 +00:00

183 lines
2.9 KiB
Plaintext

/dts-v1/;
/include/ "rt5350.dtsi"
/ {
compatible = "wizfi630a", "ralink,rt5350-soc";
model = "WIZnet WizFi630A";
chosen {
bootargs = "console=ttyS1,115200";
};
palmbus@10000000 {
gpio1: gpio@660 {
status = "okay";
};
spi@b00 {
status = "okay";
m25p80@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor";
reg = <0>;
linux,modalias = "m25p80", "w25q128";
spi-max-frequency = <10000000>;
partition@0 {
label = "uboot";
reg = <0x0 0x30000>;
read-only;
};
partition@30000 {
label = "uboot-env";
reg = <0x30000 0x10000>;
read-only;
};
factory: partition@40000 {
label = "factory";
reg = <0x40000 0x10000>;
read-only;
};
partition@50000 {
label = "firmware";
reg = <0x50000 0xfb0000>;
};
};
};
uart@500 {
compatible = "ralink,mt7620a-uart", "ralink,rt2880-uart", "ns16550a";
reg = <0x500 0x100>;
resets = <&rstctrl 12>;
reset-names = "uart";
interrupt-parent = <&intc>;
interrupts = <5>;
reg-shift = <2>;
pinctrl-names = "default";
pinctrl-0 = <&uartf_pins>;
status = "okay";
};
uartlite@c00 {
compatible = "ralink,mt7620a-uart", "ralink,rt2880-uart", "ns16550a";
reg = <0xc00 0x100>;
resets = <&rstctrl 19>;
reset-names = "uartl";
interrupt-parent = <&intc>;
interrupts = <12>;
reg-shift = <2>;
pinctrl-names = "default";
pinctrl-0 = <&uartlite_pins>;
};
};
pinctrl {
state_default: pinctrl0 {
gpio {
ralink,group = "i2c", "jtag" ;
ralink,function = "gpio";
};
};
uartf_gpio_pins: uartf_gpio {
uartf_gpio {
ralink,group = "uartf";
ralink,function = "uartf";
};
};
uartlite_pins: uartlite {
uart {
ralink,group = "uartlite";
ralink,function = "uartlite";
};
};
};
ethernet@10100000 {
mtd-mac-address = <&factory 0x4>;
};
esw@10110000 {
mediatek,portmap = <0x17>;
};
wmac@10180000 {
ralink,mtd-eeprom = <&factory 0>;
};
ehci@101c0000 {
status = "okay";
};
ohci@101c1000 {
status = "okay";
};
gpio-export {
compatible = "gpio-export";
#size-cells = <0>;
};
gpio-leds {
compatible = "gpio-leds";
run {
label = "wizfi630a::run";
gpios = <&gpio0 1 1>;
};
wps {
label = "wizfi630a::wps";
gpios = <&gpio0 20 1>;
};
uart1 {
label = "wizfi630a::uart1";
gpios = <&gpio0 18 1>;
};
uart2 {
label = "wizfi630a::uart2";
gpios = <&gpio0 21 1>;
};
};
gpio-keys-polled {
compatible = "gpio-keys-polled";
#address-cells = <1>;
#size-cells = <0>;
poll-interval = <20>;
reset {
label = "reset";
gpios = <&gpio0 17 1>;
linux,code = <0x198>;
};
wps {
label = "wps";
gpios = <&gpio0 0 1>;
linux,code = <0x211>;
};
scm1 {
label = "SCM1";
gpios = <&gpio0 19 1>;
linux,code = <0x100>;
};
scm2 {
label = "SCM2";
gpios = <&gpio0 2 1>;
linux,code = <0x101>;
};
};
};