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2ad898e091
Removed upstreamed: generic/backport-6.1/789-STABLE-01-net-dsa-mt7530-prevent-possible-incorrect-XTAL-frequ.patch [1] generic/backport-6.1/789-STABLE-02-net-dsa-mt7530-fix-link-local-frames-that-ingress-vl.patch [2] generic/backport-6.1/789-STABLE-03-net-dsa-mt7530-fix-handling-of-all-link-local-frames.patch [3] generic/pending-6.1/735-net-mediatek-mtk_eth_soc-release-MAC_MCR_FORCE_LINK-.patch [4] generic/pending-6.1/736-net-ethernet-mtk_eth_soc-fix-PPE-hanging-issue.patch [5] Manual adjusted the following patches: mediatek/patches-6.1/100-dts-update-mt7622-rfb1.patch 1. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v6.1.83&id=be4512b9ac6fc53e1ca8daccbda84f643215c547 2. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v6.1.83&id=f1fa919ea59655f73cb3972264e157b8831ba546 3. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v6.1.83&id=86c0c154a759f2af9612a04bdf29110f02dce956 4. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v6.1.83&id=6b62bad2da1b338f452a9380639fc9b093d75a25 5. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v6.1.83&id=f78807362828ad01db2a9ed005bf79501b620f27 Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
39 lines
1.2 KiB
Diff
39 lines
1.2 KiB
Diff
From 3b92c547e3d4a35c6214b3e7fa1103d0749d83b1 Mon Sep 17 00:00:00 2001
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From: Daniel Golle <daniel@makrotopia.org>
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Date: Fri, 21 Apr 2023 15:20:44 +0200
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Subject: [PATCH 12/19] arm64: dts: mt7986: add PWM
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This adds pwm node to mt7986.
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Signed-off-by: Daniel Golle <daniel@makrotopia.org>
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Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
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Link: https://lore.kernel.org/r/20230421132047.42166-5-linux@fw-web.de
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Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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---
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arch/arm64/boot/dts/mediatek/mt7986a.dtsi | 14 ++++++++++++++
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1 file changed, 14 insertions(+)
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--- a/arch/arm64/boot/dts/mediatek/mt7986a.dtsi
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+++ b/arch/arm64/boot/dts/mediatek/mt7986a.dtsi
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@@ -241,6 +241,20 @@
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status = "disabled";
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};
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+ pwm: pwm@10048000 {
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+ compatible = "mediatek,mt7986-pwm";
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+ reg = <0 0x10048000 0 0x1000>;
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+ #clock-cells = <1>;
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+ #pwm-cells = <2>;
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+ interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>;
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+ clocks = <&topckgen CLK_TOP_PWM_SEL>,
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+ <&infracfg CLK_INFRA_PWM_STA>,
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+ <&infracfg CLK_INFRA_PWM1_CK>,
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+ <&infracfg CLK_INFRA_PWM2_CK>;
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+ clock-names = "top", "main", "pwm1", "pwm2";
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+ status = "disabled";
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+ };
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+
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uart0: serial@11002000 {
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compatible = "mediatek,mt7986-uart",
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"mediatek,mt6577-uart";
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