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95 lines
2.7 KiB
Diff
95 lines
2.7 KiB
Diff
From bbbbf16c44f34a2d563fa7d71de64ffe3b4b82dc Mon Sep 17 00:00:00 2001
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From: Claudiu Beznea <claudiu.beznea@microchip.com>
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Date: Thu, 15 Apr 2021 13:50:04 +0300
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Subject: [PATCH 213/247] ARM: at91: pm: add sama7g5 ddr phy controller
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SAMA7G5 self-refresh procedure accesses also the DDR PHY registers.
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Adapt the code so that the at91_dt_ramc() to look also for DDR PHYs,
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in case it is mandatory.
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Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
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Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
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Link: https://lore.kernel.org/r/20210415105010.569620-19-claudiu.beznea@microchip.com
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---
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arch/arm/mach-at91/pm.c | 27 +++++++++++++++++++++------
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1 file changed, 21 insertions(+), 6 deletions(-)
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--- a/arch/arm/mach-at91/pm.c
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+++ b/arch/arm/mach-at91/pm.c
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@@ -552,7 +552,12 @@ static const struct of_device_id ramc_id
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{ /*sentinel*/ }
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};
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-static __init int at91_dt_ramc(void)
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+static const struct of_device_id ramc_phy_ids[] __initconst = {
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+ { .compatible = "microchip,sama7g5-ddr3phy", },
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+ { /* Sentinel. */ },
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+};
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+
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+static __init void at91_dt_ramc(bool phy_mandatory)
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{
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struct device_node *np;
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const struct of_device_id *of_id;
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@@ -585,6 +590,16 @@ static __init int at91_dt_ramc(void)
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goto unmap_ramc;
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}
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+ /* Lookup for DDR PHY node, if any. */
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+ for_each_matching_node_and_match(np, ramc_phy_ids, &of_id) {
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+ soc_pm.data.ramc_phy = of_iomap(np, 0);
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+ if (!soc_pm.data.ramc_phy)
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+ panic(pr_fmt("unable to map ramc phy cpu registers\n"));
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+ }
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+
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+ if (phy_mandatory && !soc_pm.data.ramc_phy)
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+ panic(pr_fmt("DDR PHY is mandatory!\n"));
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+
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if (!standby) {
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pr_warn("ramc no standby function available\n");
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return 0;
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@@ -953,7 +968,7 @@ void __init at91rm9200_pm_init(void)
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soc_pm.data.standby_mode = AT91_PM_STANDBY;
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soc_pm.data.suspend_mode = AT91_PM_ULP0;
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- ret = at91_dt_ramc();
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+ ret = at91_dt_ramc(false);
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if (ret)
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return;
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@@ -980,7 +995,7 @@ void __init sam9x60_pm_init(void)
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at91_pm_modes_validate(modes, ARRAY_SIZE(modes));
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at91_pm_modes_init(iomaps, ARRAY_SIZE(iomaps));
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- ret = at91_dt_ramc();
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+ ret = at91_dt_ramc(false);
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if (ret)
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return;
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@@ -1005,7 +1020,7 @@ void __init at91sam9_pm_init(void)
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soc_pm.data.standby_mode = AT91_PM_STANDBY;
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soc_pm.data.suspend_mode = AT91_PM_ULP0;
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- ret = at91_dt_ramc();
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+ ret = at91_dt_ramc(false);
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if (ret)
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return;
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@@ -1023,7 +1038,7 @@ void __init sama5_pm_init(void)
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return;
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at91_pm_modes_validate(modes, ARRAY_SIZE(modes));
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- ret = at91_dt_ramc();
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+ ret = at91_dt_ramc(false);
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if (ret)
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return;
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@@ -1048,7 +1063,7 @@ void __init sama5d2_pm_init(void)
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at91_pm_modes_validate(modes, ARRAY_SIZE(modes));
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at91_pm_modes_init(iomaps, ARRAY_SIZE(iomaps));
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- ret = at91_dt_ramc();
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+ ret = at91_dt_ramc(false);
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if (ret)
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return;
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