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https://github.com/openwrt/openwrt.git
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4f8b350be0
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
271 lines
8.2 KiB
Diff
271 lines
8.2 KiB
Diff
From ffbb6cc14b8fb1876b249048284a5fe30f48c693 Mon Sep 17 00:00:00 2001
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From: Annaliese McDermond <nh6z@nh6z.net>
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Date: Sat, 8 Jun 2019 10:14:43 -0700
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Subject: [PATCH 517/806] i2c: bcm2835: Model Divider in CCF
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Commit bebff81fb8b9216eb4fba22cf910553621ae3477 upstream.
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Model the I2C bus clock divider as a part of the Core Clock Framework.
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Primarily this removes the clk_get_rate() call from each transfer.
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This call causes problems for slave drivers that themselves have
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internal clock components that are controlled by an I2C interface.
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When the slave's internal clock component is prepared, the prepare
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lock is obtained, and it makes calls to the I2C subsystem to
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command the hardware to activate the clock. In order to perform
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the I2C transfer, this driver sets the divider, which requires
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it to get the parent clock rate, which it does with clk_get_rate().
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Unfortunately, this function will try to take the clock prepare
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lock, which is already held by the slave's internal clock calls
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creating a deadlock.
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Modeling the divider in the CCF natively removes this dependency
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and the divider value is only set upon changing the bus clock
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frequency or changes in the parent clock that cascade down to this
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divisor. This obviates the need to set the divider with every
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transfer and avoids the deadlock described above. It also should
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provide better clock debugging and save a few cycles on each
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transfer due to not having to recalcuate the divider value.
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Signed-off-by: Annaliese McDermond <nh6z@nh6z.net>
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Acked-by: Stefan Wahren <stefan.wahren@i2se.com>
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Reviewed-by: Eric Anholt <eric@anholt.net>
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Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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---
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drivers/i2c/busses/i2c-bcm2835.c | 145 ++++++++++++++++++++++++-------
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1 file changed, 114 insertions(+), 31 deletions(-)
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--- a/drivers/i2c/busses/i2c-bcm2835.c
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+++ b/drivers/i2c/busses/i2c-bcm2835.c
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@@ -12,6 +12,8 @@
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*/
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#include <linux/clk.h>
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+#include <linux/clkdev.h>
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+#include <linux/clk-provider.h>
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#include <linux/completion.h>
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#include <linux/err.h>
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#include <linux/i2c.h>
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@@ -71,9 +73,7 @@ struct bcm2835_debug {
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struct bcm2835_i2c_dev {
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struct device *dev;
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void __iomem *regs;
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- struct clk *clk;
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int irq;
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- u32 bus_clk_rate;
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struct i2c_adapter adapter;
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struct completion completion;
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struct i2c_msg *curr_msg;
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@@ -164,12 +164,17 @@ static inline u32 bcm2835_i2c_readl(stru
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return readl(i2c_dev->regs + reg);
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}
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-static int bcm2835_i2c_set_divider(struct bcm2835_i2c_dev *i2c_dev)
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+#define to_clk_bcm2835_i2c(_hw) container_of(_hw, struct clk_bcm2835_i2c, hw)
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+struct clk_bcm2835_i2c {
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+ struct clk_hw hw;
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+ struct bcm2835_i2c_dev *i2c_dev;
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+};
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+
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+static int clk_bcm2835_i2c_calc_divider(unsigned long rate,
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+ unsigned long parent_rate)
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{
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- u32 divider, redl, fedl;
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+ u32 divider = DIV_ROUND_UP(parent_rate, rate);
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- divider = DIV_ROUND_UP(clk_get_rate(i2c_dev->clk),
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- i2c_dev->bus_clk_rate);
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/*
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* Per the datasheet, the register is always interpreted as an even
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* number, by rounding down. In other words, the LSB is ignored. So,
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@@ -178,12 +183,23 @@ static int bcm2835_i2c_set_divider(struc
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if (divider & 1)
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divider++;
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if ((divider < BCM2835_I2C_CDIV_MIN) ||
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- (divider > BCM2835_I2C_CDIV_MAX)) {
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- dev_err_ratelimited(i2c_dev->dev, "Invalid clock-frequency\n");
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+ (divider > BCM2835_I2C_CDIV_MAX))
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return -EINVAL;
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- }
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- bcm2835_i2c_writel(i2c_dev, BCM2835_I2C_DIV, divider);
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+ return divider;
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+}
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+
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+static int clk_bcm2835_i2c_set_rate(struct clk_hw *hw, unsigned long rate,
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+ unsigned long parent_rate)
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+{
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+ struct clk_bcm2835_i2c *div = to_clk_bcm2835_i2c(hw);
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+ u32 redl, fedl;
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+ u32 divider = clk_bcm2835_i2c_calc_divider(rate, parent_rate);
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+
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+ if (divider == -EINVAL)
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+ return -EINVAL;
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+
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+ bcm2835_i2c_writel(div->i2c_dev, BCM2835_I2C_DIV, divider);
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/*
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* Number of core clocks to wait after falling edge before
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@@ -198,12 +214,62 @@ static int bcm2835_i2c_set_divider(struc
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*/
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redl = max(divider / 4, 1u);
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- bcm2835_i2c_writel(i2c_dev, BCM2835_I2C_DEL,
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+ bcm2835_i2c_writel(div->i2c_dev, BCM2835_I2C_DEL,
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(fedl << BCM2835_I2C_FEDL_SHIFT) |
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(redl << BCM2835_I2C_REDL_SHIFT));
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return 0;
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}
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+static long clk_bcm2835_i2c_round_rate(struct clk_hw *hw, unsigned long rate,
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+ unsigned long *parent_rate)
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+{
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+ u32 divider = clk_bcm2835_i2c_calc_divider(rate, *parent_rate);
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+
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+ return DIV_ROUND_UP(*parent_rate, divider);
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+}
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+
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+static unsigned long clk_bcm2835_i2c_recalc_rate(struct clk_hw *hw,
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+ unsigned long parent_rate)
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+{
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+ struct clk_bcm2835_i2c *div = to_clk_bcm2835_i2c(hw);
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+ u32 divider = bcm2835_i2c_readl(div->i2c_dev, BCM2835_I2C_DIV);
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+
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+ return DIV_ROUND_UP(parent_rate, divider);
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+}
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+
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+static const struct clk_ops clk_bcm2835_i2c_ops = {
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+ .set_rate = clk_bcm2835_i2c_set_rate,
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+ .round_rate = clk_bcm2835_i2c_round_rate,
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+ .recalc_rate = clk_bcm2835_i2c_recalc_rate,
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+};
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+
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+static struct clk *bcm2835_i2c_register_div(struct device *dev,
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+ const char *mclk_name,
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+ struct bcm2835_i2c_dev *i2c_dev)
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+{
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+ struct clk_init_data init;
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+ struct clk_bcm2835_i2c *priv;
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+ char name[32];
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+
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+ snprintf(name, sizeof(name), "%s_div", dev_name(dev));
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+
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+ init.ops = &clk_bcm2835_i2c_ops;
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+ init.name = name;
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+ init.parent_names = (const char* []) { mclk_name };
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+ init.num_parents = 1;
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+ init.flags = 0;
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+
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+ priv = devm_kzalloc(dev, sizeof(struct clk_bcm2835_i2c), GFP_KERNEL);
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+ if (priv == NULL)
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+ return ERR_PTR(-ENOMEM);
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+
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+ priv->hw.init = &init;
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+ priv->i2c_dev = i2c_dev;
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+
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+ clk_hw_register_clkdev(&priv->hw, "div", dev_name(dev));
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+ return devm_clk_register(dev, &priv->hw);
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+}
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+
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static void bcm2835_fill_txfifo(struct bcm2835_i2c_dev *i2c_dev)
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{
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u32 val;
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@@ -363,7 +429,7 @@ static int bcm2835_i2c_xfer(struct i2c_a
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{
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struct bcm2835_i2c_dev *i2c_dev = i2c_get_adapdata(adap);
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unsigned long time_left;
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- int i, ret;
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+ int i;
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if (debug)
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i2c_dev->debug_num_msgs = num;
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@@ -379,10 +445,6 @@ static int bcm2835_i2c_xfer(struct i2c_a
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return -EOPNOTSUPP;
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}
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- ret = bcm2835_i2c_set_divider(i2c_dev);
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- if (ret)
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- return ret;
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-
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i2c_dev->curr_msg = msgs;
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i2c_dev->num_msgs = num;
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reinit_completion(&i2c_dev->completion);
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@@ -443,6 +505,9 @@ static int bcm2835_i2c_probe(struct plat
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struct resource *mem, *irq;
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int ret;
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struct i2c_adapter *adap;
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+ const char *mclk_name;
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+ struct clk *bus_clk;
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+ u32 bus_clk_rate;
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i2c_dev = devm_kzalloc(&pdev->dev, sizeof(*i2c_dev), GFP_KERNEL);
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if (!i2c_dev)
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@@ -456,21 +521,6 @@ static int bcm2835_i2c_probe(struct plat
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if (IS_ERR(i2c_dev->regs))
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return PTR_ERR(i2c_dev->regs);
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- i2c_dev->clk = devm_clk_get(&pdev->dev, NULL);
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- if (IS_ERR(i2c_dev->clk)) {
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- if (PTR_ERR(i2c_dev->clk) != -EPROBE_DEFER)
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- dev_err(&pdev->dev, "Could not get clock\n");
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- return PTR_ERR(i2c_dev->clk);
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- }
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-
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- ret = of_property_read_u32(pdev->dev.of_node, "clock-frequency",
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- &i2c_dev->bus_clk_rate);
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- if (ret < 0) {
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- dev_warn(&pdev->dev,
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- "Could not read clock-frequency property\n");
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- i2c_dev->bus_clk_rate = 100000;
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- }
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-
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irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
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if (!irq) {
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dev_err(&pdev->dev, "No IRQ resource\n");
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@@ -485,6 +535,35 @@ static int bcm2835_i2c_probe(struct plat
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return -ENODEV;
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}
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+ mclk_name = of_clk_get_parent_name(pdev->dev.of_node, 0);
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+
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+ bus_clk = bcm2835_i2c_register_div(&pdev->dev, mclk_name, i2c_dev);
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+
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+ if (IS_ERR(bus_clk)) {
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+ dev_err(&pdev->dev, "Could not register clock\n");
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+ return PTR_ERR(bus_clk);
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+ }
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+
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+ ret = of_property_read_u32(pdev->dev.of_node, "clock-frequency",
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+ &bus_clk_rate);
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+ if (ret < 0) {
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+ dev_warn(&pdev->dev,
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+ "Could not read clock-frequency property\n");
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+ bus_clk_rate = 100000;
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+ }
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+
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+ ret = clk_set_rate_exclusive(bus_clk, bus_clk_rate);
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+ if (ret < 0) {
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+ dev_err(&pdev->dev, "Could not set clock frequency\n");
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+ return ret;
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+ }
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+
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+ ret = clk_prepare_enable(bus_clk);
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+ if (ret) {
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+ dev_err(&pdev->dev, "Couldn't prepare clock");
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+ return ret;
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+ }
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+
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adap = &i2c_dev->adapter;
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i2c_set_adapdata(adap, i2c_dev);
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adap->owner = THIS_MODULE;
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@@ -507,6 +586,10 @@ static int bcm2835_i2c_probe(struct plat
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static int bcm2835_i2c_remove(struct platform_device *pdev)
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{
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struct bcm2835_i2c_dev *i2c_dev = platform_get_drvdata(pdev);
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+ struct clk *bus_clk = devm_clk_get(i2c_dev->dev, "div");
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+
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+ clk_rate_exclusive_put(bus_clk);
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+ clk_disable_unprepare(bus_clk);
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free_irq(i2c_dev->irq, i2c_dev);
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i2c_del_adapter(&i2c_dev->adapter);
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