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6f5c301eab
Backport merged upstream patch that adds support for firmware loader from NVMEM or attached filesystem for Aquantia PHYs. Refresh all kernel patches affected by this change. Also update the path for aquantia .ko that got moved to dedicated directory upstream. Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
111 lines
3.9 KiB
Diff
111 lines
3.9 KiB
Diff
Author: Thomas Kupper <thomas.kupper@gmail.com>
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Date: Wed May 24 21:14:17 2023 +0200
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kernel: phy: add Aquantia PHY AQR111 & AQR111B0
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Add the IDs for Aquantia PHY AQR111 and AQR111B0 as found in the GPL sources
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of the Netgear RAX120v2 firmware v1.2.8.40.
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This is a 5GbE chip but it reports support for 10G. Implement config_init()
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to set max speed to 5G.
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Signed-off-by: Thomas Kupper <thomas.kupper@gmail.com>
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--- a/drivers/net/phy/aquantia/aquantia_main.c
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+++ b/drivers/net/phy/aquantia/aquantia_main.c
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@@ -24,6 +24,8 @@
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#define PHY_ID_AQR405 0x03a1b4b0
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#define PHY_ID_AQR113C 0x31c31c12
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#define PHY_ID_AQR813 0x31c31cb2
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+#define PHY_ID_AQR111 0x03a1b610
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+#define PHY_ID_AQR111B0 0x03a1b612
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#define PHY_ID_AQR112 0x03a1b662
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#define PHY_ID_AQR412 0x03a1b712
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#define PHY_ID_AQR113 0x31c31c40
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@@ -674,6 +676,34 @@ static int aqcs109_config_init(struct ph
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return aqr107_set_downshift(phydev, MDIO_AN_VEND_PROV_DOWNSHIFT_DFLT);
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}
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+static int aqr111_config_init(struct phy_device *phydev)
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+{
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+ int ret;
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+
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+ /* Check that the PHY interface type is compatible */
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+ if (phydev->interface != PHY_INTERFACE_MODE_SGMII &&
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+ phydev->interface != PHY_INTERFACE_MODE_1000BASEKX &&
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+ phydev->interface != PHY_INTERFACE_MODE_2500BASEX &&
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+ phydev->interface != PHY_INTERFACE_MODE_XGMII &&
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+ phydev->interface != PHY_INTERFACE_MODE_USXGMII &&
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+ phydev->interface != PHY_INTERFACE_MODE_10GKR &&
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+ phydev->interface != PHY_INTERFACE_MODE_10GBASER &&
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+ phydev->interface != PHY_INTERFACE_MODE_XAUI &&
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+ phydev->interface != PHY_INTERFACE_MODE_RXAUI)
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+ return -ENODEV;
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+
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+ WARN(phydev->interface == PHY_INTERFACE_MODE_XGMII,
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+ "Your devicetree is out of date, please update it. The AQR107 family doesn't support XGMII, maybe you mean USXGMII.\n");
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+
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+ ret = aqr107_wait_reset_complete(phydev);
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+ if (!ret)
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+ aqr107_chip_info(phydev);
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+
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+ /* AQR111 reports supporting speed up to 10G, however only speeds up to 5G are supported. */
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+ phy_set_max_speed(phydev, SPEED_5000);
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+
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+ return aqr107_set_downshift(phydev, MDIO_AN_VEND_PROV_DOWNSHIFT_DFLT);
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+}
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static void aqr107_link_change_notify(struct phy_device *phydev)
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{
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u8 fw_major, fw_minor;
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@@ -912,6 +942,42 @@ static struct phy_driver aqr_driver[] =
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.link_change_notify = aqr107_link_change_notify,
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},
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{
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+ PHY_ID_MATCH_MODEL(PHY_ID_AQR111),
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+ .name = "Aquantia AQR111",
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+ .probe = aqr107_probe,
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+ .config_init = aqr111_config_init,
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+ .config_aneg = aqr_config_aneg,
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+ .config_intr = aqr_config_intr,
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+ .handle_interrupt = aqr_handle_interrupt,
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+ .read_status = aqr107_read_status,
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+ .get_tunable = aqr107_get_tunable,
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+ .set_tunable = aqr107_set_tunable,
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+ .suspend = aqr107_suspend,
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+ .resume = aqr107_resume,
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+ .get_sset_count = aqr107_get_sset_count,
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+ .get_strings = aqr107_get_strings,
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+ .get_stats = aqr107_get_stats,
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+ .link_change_notify = aqr107_link_change_notify,
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+},
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+{
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+ PHY_ID_MATCH_MODEL(PHY_ID_AQR111B0),
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+ .name = "Aquantia AQR111B0",
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+ .probe = aqr107_probe,
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+ .config_init = aqr111_config_init,
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+ .config_aneg = aqr_config_aneg,
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+ .config_intr = aqr_config_intr,
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+ .handle_interrupt = aqr_handle_interrupt,
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+ .read_status = aqr107_read_status,
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+ .get_tunable = aqr107_get_tunable,
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+ .set_tunable = aqr107_set_tunable,
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+ .suspend = aqr107_suspend,
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+ .resume = aqr107_resume,
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+ .get_sset_count = aqr107_get_sset_count,
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+ .get_strings = aqr107_get_strings,
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+ .get_stats = aqr107_get_stats,
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+ .link_change_notify = aqr107_link_change_notify,
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+},
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+{
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PHY_ID_MATCH_MODEL(PHY_ID_AQR112),
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.name = "Aquantia AQR112",
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.probe = aqr107_probe,
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@@ -981,6 +1047,8 @@ static struct mdio_device_id __maybe_unu
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{ PHY_ID_MATCH_MODEL(PHY_ID_AQR405) },
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{ PHY_ID_MATCH_MODEL(PHY_ID_AQR113C) },
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{ PHY_ID_MATCH_MODEL(PHY_ID_AQR813) },
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+ { PHY_ID_MATCH_MODEL(PHY_ID_AQR111) },
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+ { PHY_ID_MATCH_MODEL(PHY_ID_AQR111B0) },
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{ PHY_ID_MATCH_MODEL(PHY_ID_AQR112) },
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{ PHY_ID_MATCH_MODEL(PHY_ID_AQR412) },
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{ PHY_ID_MATCH_MODEL(PHY_ID_AQR113) },
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