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20ea6adbf1
Build system: x86_64 Build-tested: bcm2708, bcm2709, bcm2710, bcm2711 Run-tested: bcm2708/RPiB+, bcm2709/RPi3B, bcm2710/RPi3B, bcm2711/RPi4B Signed-off-by: Marty Jones <mj8263788@gmail.com> Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
65 lines
2.3 KiB
Diff
65 lines
2.3 KiB
Diff
From 62968215a2ebb438ca46d91b714c29803d88f8e0 Mon Sep 17 00:00:00 2001
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From: Dom Cobley <popcornmix@gmail.com>
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Date: Wed, 30 Dec 2020 14:51:29 +0000
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Subject: [PATCH] bcm2835-dma: Add bcm2835-dma: Add DMA_WIDE_SOURCE and
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DMA_WIDE_DEST flags
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Use (reserved) bits 24 and 25 of the dreq value
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(the second cell of the DT DMA descriptor) to request
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that wide source reads or wide dest writes are required
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Signed-off-by: Dom Cobley <popcornmix@gmail.com>
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---
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drivers/dma/bcm2835-dma.c | 19 ++++++++++++++++---
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1 file changed, 16 insertions(+), 3 deletions(-)
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--- a/drivers/dma/bcm2835-dma.c
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+++ b/drivers/dma/bcm2835-dma.c
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@@ -171,6 +171,17 @@ struct bcm2835_desc {
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#define WAIT_RESP(x) ((x & BCM2835_DMA_NO_WAIT_RESP) ? \
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0 : BCM2835_DMA_WAIT_RESP)
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+/* A fake bit to request that the driver requires wide reads */
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+#define BCM2835_DMA_WIDE_SOURCE BIT(24)
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+#define WIDE_SOURCE(x) ((x & BCM2835_DMA_WIDE_SOURCE) ? \
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+ BCM2835_DMA_S_WIDTH : 0)
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+
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+/* A fake bit to request that the driver requires wide writes */
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+#define BCM2835_DMA_WIDE_DEST BIT(25)
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+#define WIDE_DEST(x) ((x & BCM2835_DMA_WIDE_DEST) ? \
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+ BCM2835_DMA_D_WIDTH : 0)
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+
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+
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/* debug register bits */
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#define BCM2835_DMA_DEBUG_LAST_NOT_SET_ERR BIT(0)
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#define BCM2835_DMA_DEBUG_FIFO_ERR BIT(1)
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@@ -850,7 +861,8 @@ static struct dma_async_tx_descriptor *b
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{
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struct bcm2835_chan *c = to_bcm2835_dma_chan(chan);
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struct bcm2835_desc *d;
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- u32 info = BCM2835_DMA_D_INC | BCM2835_DMA_S_INC;
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+ u32 info = BCM2835_DMA_D_INC | BCM2835_DMA_S_INC |
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+ WIDE_SOURCE(c->dreq) | WIDE_DEST(c->dreq);
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u32 extra = BCM2835_DMA_INT_EN | WAIT_RESP(c->dreq);
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size_t max_len = bcm2835_dma_max_frame_length(c);
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size_t frames;
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@@ -881,7 +893,8 @@ static struct dma_async_tx_descriptor *b
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struct bcm2835_chan *c = to_bcm2835_dma_chan(chan);
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struct bcm2835_desc *d;
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dma_addr_t src = 0, dst = 0;
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- u32 info = WAIT_RESP(c->dreq);
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+ u32 info = WAIT_RESP(c->dreq) |
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+ WIDE_SOURCE(c->dreq) | WIDE_DEST(c->dreq);
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u32 extra = BCM2835_DMA_INT_EN;
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size_t frames;
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@@ -943,7 +956,7 @@ static struct dma_async_tx_descriptor *b
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struct bcm2835_chan *c = to_bcm2835_dma_chan(chan);
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struct bcm2835_desc *d;
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dma_addr_t src, dst;
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- u32 info = WAIT_RESP(c->dreq);
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+ u32 info = WAIT_RESP(c->dreq) | WIDE_SOURCE(c->dreq) | WIDE_DEST(c->dreq);
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u32 extra = 0;
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size_t max_len = bcm2835_dma_max_frame_length(c);
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size_t frames;
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