openwrt/target/linux/d1/patches-6.6/0035-riscv-defconfig-Enable-the-Allwinner-D1-platform-and.patch
Zoltan HERPAI 99fcc90270 kernel/d1: Create kernel files for v6.6 (from v6.1)
This is an automatically generated commit.

When doing `git bisect`, consider `git bisect --skip`.

Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu>
2024-05-29 17:56:28 +02:00

128 lines
3.9 KiB
Diff

From 73f9cc8568b6b821107d5194fa868e922b159091 Mon Sep 17 00:00:00 2001
From: Samuel Holland <samuel@sholland.org>
Date: Mon, 27 Jun 2022 01:33:05 -0500
Subject: [PATCH 035/117] riscv: defconfig: Enable the Allwinner D1 platform
and drivers
Now that several D1-based boards are supported, enable the platform in
our defconfig. Build in the drivers which are necessary to boot, such as
the pinctrl, MMC, RTC (which provides critical clocks), SPI (for flash),
and watchdog (which may be left enabled by the bootloader). Other common
onboard peripherals are enabled as modules.
Cover-letter:
riscv: Allwinner D1 platform support
This series adds the Kconfig/defconfig plumbing and devicetrees for a
range of Allwinner D1-based boards. Many features are already enabled,
including USB, Ethernet, and WiFi.
The SoC devicetree uses bindings from the following series which have
not yet been merged:
- SRAM controller:
https://lore.kernel.org/lkml/20220815041248.53268-1-samuel@sholland.org/
- NVMEM cell bits property change:
https://lore.kernel.org/lkml/20220814173656.11856-1-samuel@sholland.org/
- In-package LDO regulators:
https://lore.kernel.org/lkml/20220815043436.20170-1-samuel@sholland.org/
All three of these are required to set the correct I/O domain voltages
in the pin controller, which I would consider important to have in the
initial version of the devicetree.
The SoC devicetree does contain one small hack to avoid a dependency on
the audio codec binding, since that is not ready yet: the codec node
uses a bare "simple-mfd", "syscon" compatible.
END
Series-to: Chen-Yu Tsai <wens@csie.org>
Series-to: Jernej Skrabec <jernej.skrabec@gmail.com>
Series-to: linux-sunxi@lists.linux.dev
Series-to: Palmer Dabbelt <palmer@dabbelt.com>
Series-to: Paul Walmsley <paul.walmsley@sifive.com>
Series-to: Albert Ou <aou@eecs.berkeley.edu>
Series-to: linux-riscv@lists.infradead.org
Series-cc: Rob Herring <robh+dt@kernel.org>
Series-cc: Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>
Series-cc: devicetree@vger.kernel.org
Series-cc: linux-kernel@vger.kernel.org
Signed-off-by: Samuel Holland <samuel@sholland.org>
---
arch/riscv/configs/defconfig | 23 ++++++++++++++++++++++-
1 file changed, 22 insertions(+), 1 deletion(-)
--- a/arch/riscv/configs/defconfig
+++ b/arch/riscv/configs/defconfig
@@ -25,6 +25,7 @@ CONFIG_BLK_DEV_INITRD=y
CONFIG_EXPERT=y
# CONFIG_SYSFS_SYSCALL is not set
CONFIG_PROFILING=y
+CONFIG_ARCH_SUNXI=y
CONFIG_SOC_MICROCHIP_POLARFIRE=y
CONFIG_SOC_SIFIVE=y
CONFIG_SOC_STARFIVE=y
@@ -118,22 +119,31 @@ CONFIG_VIRTIO_NET=y
CONFIG_MACB=y
CONFIG_E1000E=y
CONFIG_R8169=y
+CONFIG_STMMAC_ETH=m
CONFIG_MICROSEMI_PHY=y
CONFIG_INPUT_MOUSEDEV=y
+CONFIG_KEYBOARD_SUN4I_LRADC=m
CONFIG_SERIAL_8250=y
CONFIG_SERIAL_8250_CONSOLE=y
+CONFIG_SERIAL_8250_DW=y
CONFIG_SERIAL_OF_PLATFORM=y
CONFIG_VIRTIO_CONSOLE=y
CONFIG_HW_RANDOM=y
CONFIG_HW_RANDOM_VIRTIO=y
+CONFIG_I2C_MV64XXX=m
CONFIG_SPI=y
CONFIG_SPI_SIFIVE=y
+CONFIG_SPI_SUN6I=y
# CONFIG_PTP_1588_CLOCK is not set
-CONFIG_GPIOLIB=y
CONFIG_GPIO_SIFIVE=y
+CONFIG_WATCHDOG=y
+CONFIG_SUNXI_WATCHDOG=y
+CONFIG_REGULATOR=y
+CONFIG_REGULATOR_FIXED_VOLTAGE=y
CONFIG_DRM=m
CONFIG_DRM_RADEON=m
CONFIG_DRM_NOUVEAU=m
+CONFIG_DRM_SUN4I=m
CONFIG_DRM_VIRTIO_GPU=m
CONFIG_FB=y
CONFIG_FRAMEBUFFER_CONSOLE=y
@@ -146,19 +156,30 @@ CONFIG_USB_OHCI_HCD=y
CONFIG_USB_OHCI_HCD_PLATFORM=y
CONFIG_USB_STORAGE=y
CONFIG_USB_UAS=y
+CONFIG_USB_MUSB_HDRC=m
+CONFIG_USB_MUSB_SUNXI=m
+CONFIG_NOP_USB_XCEIV=m
CONFIG_MMC=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_PLTFM=y
CONFIG_MMC_SDHCI_CADENCE=y
CONFIG_MMC_SPI=y
+CONFIG_MMC_SUNXI=y
CONFIG_RTC_CLASS=y
+CONFIG_RTC_DRV_SUN6I=y
+CONFIG_DMADEVICES=y
+CONFIG_DMA_SUN6I=m
CONFIG_VIRTIO_PCI=y
CONFIG_VIRTIO_BALLOON=y
CONFIG_VIRTIO_INPUT=y
CONFIG_VIRTIO_MMIO=y
+CONFIG_SUN8I_DE2_CCU=m
+CONFIG_SUN50I_IOMMU=y
CONFIG_RPMSG_CHAR=y
CONFIG_RPMSG_CTRL=y
CONFIG_RPMSG_VIRTIO=y
+CONFIG_PHY_SUN4I_USB=m
+CONFIG_NVMEM_SUNXI_SID=y
CONFIG_EXT4_FS=y
CONFIG_EXT4_FS_POSIX_ACL=y
CONFIG_EXT4_FS_SECURITY=y