openwrt/target/linux/ar71xx/patches-4.1/820-MIPS-ath79-add_gpio_function2_setup.patch
Hauke Mehrtens abea1127c9 ar71xx: add function to access the GPIO function2 register
Add access to the function2 gpio register. This probably has to be
converted into a pimux driver later on. This is needed for some setup
functions on the Arduino Yun.

Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>

SVN-Revision: 47449
2015-11-10 23:10:11 +00:00

73 lines
2.1 KiB
Diff

Add access to the function2 gpio register. This probably has to be
converted into a pimux driver later on. This is needed for some setup
functions on the Arduino Yun.
--- a/arch/mips/ath79/common.h
+++ b/arch/mips/ath79/common.h
@@ -27,6 +27,7 @@ void ath79_ddr_wb_flush(unsigned int reg
void ath79_gpio_function_enable(u32 mask);
void ath79_gpio_function_disable(u32 mask);
void ath79_gpio_function_setup(u32 set, u32 clear);
+void ath79_gpio_function2_setup(u32 set, u32 clear);
void ath79_gpio_output_select(unsigned gpio, u8 val);
int ath79_gpio_direction_select(unsigned gpio, bool oe);
void ath79_gpio_init(void);
--- a/arch/mips/ath79/gpio.c
+++ b/arch/mips/ath79/gpio.c
@@ -193,6 +193,36 @@ static void __iomem *ath79_gpio_get_func
return ath79_gpio_base + reg;
}
+static void __iomem *ath79_gpio_get_function2_reg(void)
+{
+ u32 reg = 0;
+
+ if (soc_is_ar71xx() ||
+ soc_is_ar724x() ||
+ soc_is_ar913x() ||
+ soc_is_ar933x())
+ reg = AR71XX_GPIO_REG_FUNC_2;
+ else
+ BUG();
+
+ return ath79_gpio_base + reg;
+}
+
+
+void ath79_gpio_function2_setup(u32 set, u32 clear)
+{
+ void __iomem *reg = ath79_gpio_get_function2_reg();
+ unsigned long flags;
+
+ spin_lock_irqsave(&ath79_gpio_lock, flags);
+
+ __raw_writel((__raw_readl(reg) & ~clear) | set, reg);
+ /* flush write */
+ __raw_readl(reg);
+
+ spin_unlock_irqrestore(&ath79_gpio_lock, flags);
+}
+
void ath79_gpio_function_setup(u32 set, u32 clear)
{
void __iomem *reg = ath79_gpio_get_function_reg();
--- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
+++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
@@ -840,6 +840,7 @@
#define AR71XX_GPIO_REG_INT_PENDING 0x20
#define AR71XX_GPIO_REG_INT_ENABLE 0x24
#define AR71XX_GPIO_REG_FUNC 0x28
+#define AR71XX_GPIO_REG_FUNC_2 0x30
#define AR934X_GPIO_REG_OUT_FUNC0 0x2c
#define AR934X_GPIO_REG_OUT_FUNC1 0x30
@@ -964,6 +965,8 @@
#define AR724X_GPIO_FUNC_UART_EN BIT(1)
#define AR724X_GPIO_FUNC_JTAG_DISABLE BIT(0)
+#define AR933X_GPIO_FUNC2_JUMPSTART_DISABLE BIT(9)
+
#define AR913X_GPIO_FUNC_WMAC_LED_EN BIT(22)
#define AR913X_GPIO_FUNC_EXP_PORT_CS_EN BIT(21)
#define AR913X_GPIO_FUNC_I2S_REFCLKEN BIT(20)