mirror of
https://github.com/openwrt/openwrt.git
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312 lines
8.4 KiB
Diff
312 lines
8.4 KiB
Diff
From d7e679017ec92824145b275572f6ef83d461f076 Mon Sep 17 00:00:00 2001
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From: John Crispin <blogic@openwrt.org>
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Date: Tue, 19 Mar 2013 09:26:22 +0100
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Subject: [PATCH 204/208] owrt: MIPS: ralink: add usb platform support
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Add code to load the platform ehci/ohci driver on Ralink SoC. For the usb core
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to work we need to populate the platform_data during boot, prior to the usb
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driver being loaded.
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Signed-off-by: John Crispin <blogic@openwrt.org>
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---
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arch/mips/ralink/Makefile | 4 +-
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arch/mips/ralink/common.h | 1 +
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arch/mips/ralink/mt7620.c | 5 ++
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arch/mips/ralink/of.c | 1 +
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arch/mips/ralink/rt305x-usb.c | 120 +++++++++++++++++++++++++++++++++++++++++
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arch/mips/ralink/rt3883-usb.c | 118 ++++++++++++++++++++++++++++++++++++++++
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6 files changed, 247 insertions(+), 2 deletions(-)
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create mode 100644 arch/mips/ralink/rt305x-usb.c
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create mode 100644 arch/mips/ralink/rt3883-usb.c
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--- a/arch/mips/ralink/Makefile
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+++ b/arch/mips/ralink/Makefile
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@@ -9,8 +9,8 @@
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obj-y := prom.o of.o reset.o clk.o irq.o pinmux.o timer.o
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obj-$(CONFIG_SOC_RT288X) += rt288x.o
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-obj-$(CONFIG_SOC_RT305X) += rt305x.o
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-obj-$(CONFIG_SOC_RT3883) += rt3883.o
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+obj-$(CONFIG_SOC_RT305X) += rt305x.o rt305x-usb.o
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+obj-$(CONFIG_SOC_RT3883) += rt3883.o rt3883-usb.o
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obj-$(CONFIG_SOC_MT7620) += mt7620.o
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obj-$(CONFIG_EARLY_PRINTK) += early_printk.o
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--- a/arch/mips/ralink/common.h
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+++ b/arch/mips/ralink/common.h
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@@ -51,5 +51,6 @@ extern void prom_soc_init(struct ralink_
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__iomem void *plat_of_remap_node(const char *node);
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void ralink_pinmux(void);
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+void ralink_usb_platform(void);
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#endif /* _RALINK_COMMON_H__ */
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--- a/arch/mips/ralink/mt7620.c
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+++ b/arch/mips/ralink/mt7620.c
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@@ -140,6 +140,11 @@ struct ralink_pinmux rt_gpio_pinmux = {
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.uart_mask = MT7620_GPIO_MODE_GPIO,
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};
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+void ralink_usb_platform(void)
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+{
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+
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+}
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+
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void __init ralink_clk_init(void)
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{
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unsigned long cpu_rate, sys_rate;
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--- a/arch/mips/ralink/of.c
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+++ b/arch/mips/ralink/of.c
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@@ -111,6 +111,7 @@ static int __init plat_of_setup(void)
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panic("failed to populate DT\n");
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ralink_pinmux();
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+ ralink_usb_platform();
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return 0;
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}
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--- /dev/null
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+++ b/arch/mips/ralink/rt305x-usb.c
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@@ -0,0 +1,120 @@
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+/*
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+ * This program is free software; you can redistribute it and/or modify it
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+ * under the terms of the GNU General Public License version 2 as published
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+ * by the Free Software Foundation.
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+ *
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+ * Copyright (C) 2008-2011 Gabor Juhos <juhosg@openwrt.org>
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+ * Copyright (C) 2013 John Crispin <blogic@openwrt.org>
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+ */
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+
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+#include <linux/kernel.h>
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+#include <linux/init.h>
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+#include <linux/module.h>
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+
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+#include <linux/delay.h>
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+#include <linux/of_platform.h>
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+#include <linux/dma-mapping.h>
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+#include <linux/usb/ehci_pdriver.h>
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+#include <linux/usb/ohci_pdriver.h>
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+
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+#include <asm/mach-ralink/ralink_regs.h>
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+#include <asm/mach-ralink/rt305x.h>
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+
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+static atomic_t rt3352_usb_pwr_ref = ATOMIC_INIT(0);
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+
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+static int rt3352_usb_power_on(struct platform_device *pdev)
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+{
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+
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+ if (atomic_inc_return(&rt3352_usb_pwr_ref) == 1) {
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+ u32 t;
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+
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+ t = rt_sysc_r32(RT3352_SYSC_REG_USB_PS);
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+
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+ /* enable clock for port0's and port1's phys */
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+ t = rt_sysc_r32(RT3352_SYSC_REG_CLKCFG1);
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+ t |= RT3352_CLKCFG1_UPHY0_CLK_EN | RT3352_CLKCFG1_UPHY1_CLK_EN;
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+ rt_sysc_w32(t, RT3352_SYSC_REG_CLKCFG1);
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+ mdelay(500);
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+
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+ /* pull USBHOST and USBDEV out from reset */
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+ t = rt_sysc_r32(RT3352_SYSC_REG_RSTCTRL);
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+ t &= ~(RT3352_RSTCTRL_UHST | RT3352_RSTCTRL_UDEV);
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+ rt_sysc_w32(t, RT3352_SYSC_REG_RSTCTRL);
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+ mdelay(500);
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+
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+ /* enable host mode */
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+ t = rt_sysc_r32(RT3352_SYSC_REG_SYSCFG1);
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+ t |= RT3352_SYSCFG1_USB0_HOST_MODE;
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+ rt_sysc_w32(t, RT3352_SYSC_REG_SYSCFG1);
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+
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+ t = rt_sysc_r32(RT3352_SYSC_REG_USB_PS);
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+ }
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+
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+ return 0;
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+}
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+
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+static void rt3352_usb_power_off(struct platform_device *pdev)
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+{
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+ if (atomic_dec_return(&rt3352_usb_pwr_ref) == 0) {
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+ u32 t;
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+
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+ /* put USBHOST and USBDEV into reset */
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+ t = rt_sysc_r32(RT3352_SYSC_REG_RSTCTRL);
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+ t |= RT3352_RSTCTRL_UHST | RT3352_RSTCTRL_UDEV;
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+ rt_sysc_w32(t, RT3352_SYSC_REG_RSTCTRL);
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+ udelay(10000);
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+
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+ /* disable clock for port0's and port1's phys*/
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+ t = rt_sysc_r32(RT3352_SYSC_REG_CLKCFG1);
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+ t &= ~(RT3352_CLKCFG1_UPHY0_CLK_EN | RT3352_CLKCFG1_UPHY1_CLK_EN);
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+ rt_sysc_w32(t, RT3352_SYSC_REG_CLKCFG1);
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+ udelay(10000);
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+ }
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+}
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+
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+static struct usb_ehci_pdata rt3352_ehci_data = {
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+ .power_on = rt3352_usb_power_on,
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+ .power_off = rt3352_usb_power_off,
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+};
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+
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+static struct usb_ohci_pdata rt3352_ohci_data = {
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+ .power_on = rt3352_usb_power_on,
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+ .power_off = rt3352_usb_power_off,
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+};
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+
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+static void ralink_add_usb(char *name, void *pdata, u64 *mask)
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+{
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+ struct device_node *node;
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+ struct platform_device *pdev;
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+
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+ node = of_find_compatible_node(NULL, NULL, name);
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+ if (!node)
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+ return;
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+
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+ pdev = of_find_device_by_node(node);
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+ if (!pdev)
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+ goto error_out;
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+
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+ if (pdata)
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+ pdev->dev.platform_data = pdata;
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+ if (mask) {
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+ pdev->dev.dma_mask = mask;
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+ pdev->dev.coherent_dma_mask = *mask;
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+ }
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+
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+error_out:
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+ of_node_put(node);
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+}
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+
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+static u64 rt3352_ohci_dmamask = DMA_BIT_MASK(32);
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+static u64 rt3352_ehci_dmamask = DMA_BIT_MASK(32);
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+
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+void ralink_usb_platform(void)
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+{
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+ if (soc_is_rt3352() || soc_is_rt5350()) {
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+ ralink_add_usb("ohci-platform",
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+ &rt3352_ohci_data, &rt3352_ohci_dmamask);
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+ ralink_add_usb("ehci-platform",
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+ &rt3352_ehci_data, &rt3352_ehci_dmamask);
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+ }
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+}
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--- /dev/null
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+++ b/arch/mips/ralink/rt3883-usb.c
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@@ -0,0 +1,118 @@
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+/*
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+ * This program is free software; you can redistribute it and/or modify it
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+ * under the terms of the GNU General Public License version 2 as published
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+ * by the Free Software Foundation.
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+ *
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+ * Copyright (C) 2008-2011 Gabor Juhos <juhosg@openwrt.org>
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+ * Copyright (C) 2013 John Crispin <blogic@openwrt.org>
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+ */
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+
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+#include <linux/kernel.h>
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+#include <linux/init.h>
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+#include <linux/module.h>
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+
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+#include <linux/delay.h>
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+#include <linux/of_platform.h>
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+#include <linux/dma-mapping.h>
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+#include <linux/usb/ehci_pdriver.h>
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+#include <linux/usb/ohci_pdriver.h>
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+
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+#include <asm/mach-ralink/ralink_regs.h>
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+#include <asm/mach-ralink/rt3883.h>
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+
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+static atomic_t rt3883_usb_pwr_ref = ATOMIC_INIT(0);
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+
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+static int rt3883_usb_power_on(struct platform_device *pdev)
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+{
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+ if (atomic_inc_return(&rt3883_usb_pwr_ref) == 1) {
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+ u32 t;
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+
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+ t = rt_sysc_r32(RT3883_SYSC_REG_USB_PS);
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+
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+ /* enable clock for port0's and port1's phys */
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+ t = rt_sysc_r32(RT3883_SYSC_REG_CLKCFG1);
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+ t |= RT3883_CLKCFG1_UPHY0_CLK_EN | RT3883_CLKCFG1_UPHY1_CLK_EN;
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+ rt_sysc_w32(t, RT3883_SYSC_REG_CLKCFG1);
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+ mdelay(500);
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+
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+ /* pull USBHOST and USBDEV out from reset */
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+ t = rt_sysc_r32(RT3883_SYSC_REG_RSTCTRL);
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+ t &= ~(RT3883_RSTCTRL_UHST | RT3883_RSTCTRL_UDEV);
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+ rt_sysc_w32(t, RT3883_SYSC_REG_RSTCTRL);
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+ mdelay(500);
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+
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+ /* enable host mode */
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+ t = rt_sysc_r32(RT3883_SYSC_REG_SYSCFG1);
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+ t |= RT3883_SYSCFG1_USB0_HOST_MODE;
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+ rt_sysc_w32(t, RT3883_SYSC_REG_SYSCFG1);
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+
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+ t = rt_sysc_r32(RT3883_SYSC_REG_USB_PS);
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+ }
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+
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+ return 0;
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+}
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+
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+static void rt3883_usb_power_off(struct platform_device *pdev)
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+{
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+ if (atomic_dec_return(&rt3883_usb_pwr_ref) == 0) {
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+ u32 t;
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+
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+ /* put USBHOST and USBDEV into reset */
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+ t = rt_sysc_r32(RT3883_SYSC_REG_RSTCTRL);
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+ t |= RT3883_RSTCTRL_UHST | RT3883_RSTCTRL_UDEV;
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+ rt_sysc_w32(t, RT3883_SYSC_REG_RSTCTRL);
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+ udelay(10000);
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+
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+ /* disable clock for port0's and port1's phys*/
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+ t = rt_sysc_r32(RT3883_SYSC_REG_CLKCFG1);
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+ t &= ~(RT3883_CLKCFG1_UPHY0_CLK_EN |
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+ RT3883_CLKCFG1_UPHY1_CLK_EN);
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+ rt_sysc_w32(t, RT3883_SYSC_REG_CLKCFG1);
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+ udelay(10000);
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+ }
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+}
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+
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+static struct usb_ohci_pdata rt3883_ohci_data = {
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+ .power_on = rt3883_usb_power_on,
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+ .power_off = rt3883_usb_power_off,
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+};
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+
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+static struct usb_ehci_pdata rt3883_ehci_data = {
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+ .power_on = rt3883_usb_power_on,
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+ .power_off = rt3883_usb_power_off,
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+};
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+
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+static void ralink_add_usb(char *name, void *pdata, u64 *mask)
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+{
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+ struct device_node *node;
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+ struct platform_device *pdev;
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+
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+ node = of_find_compatible_node(NULL, NULL, name);
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+ if (!node)
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+ return;
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+
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+ pdev = of_find_device_by_node(node);
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+ if (!pdev)
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+ goto error_out;
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+
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+ if (pdata)
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+ pdev->dev.platform_data = pdata;
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+ if (mask) {
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+ pdev->dev.dma_mask = mask;
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+ pdev->dev.coherent_dma_mask = *mask;
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+ }
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+
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+error_out:
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+ of_node_put(node);
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+}
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+
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+static u64 rt3883_ohci_dmamask = DMA_BIT_MASK(32);
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+static u64 rt3883_ehci_dmamask = DMA_BIT_MASK(32);
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+
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+void ralink_usb_platform(void)
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+{
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+ ralink_add_usb("ohci-platform",
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+ &rt3883_ohci_data, &rt3883_ohci_dmamask);
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+ ralink_add_usb("ehci-platform",
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+ &rt3883_ehci_data, &rt3883_ehci_dmamask);
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+}
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