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The nand subtarget is not working yet. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> SVN-Revision: 33983
105 lines
2.7 KiB
Diff
105 lines
2.7 KiB
Diff
From d1a22e73f991145a4abd7d0c37bcf318703c89ed Mon Sep 17 00:00:00 2001
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From: Gabor Juhos <juhosg@openwrt.org>
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Date: Mon, 11 Jun 2012 13:24:55 +0200
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Subject: [PATCH 05/34] MIPS: pci-ar71xx: convert to a platform driver
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Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
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---
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arch/mips/pci/pci-ar71xx.c | 60 +++++++++++++++++++++++++++++++++++++++++---
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1 files changed, 56 insertions(+), 4 deletions(-)
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--- a/arch/mips/pci/pci-ar71xx.c
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+++ b/arch/mips/pci/pci-ar71xx.c
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@@ -18,6 +18,8 @@
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#include <linux/pci.h>
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#include <linux/pci_regs.h>
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#include <linux/interrupt.h>
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+#include <linux/module.h>
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+#include <linux/platform_device.h>
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#include <asm/mach-ath79/ar71xx_regs.h>
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#include <asm/mach-ath79/ath79.h>
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@@ -309,7 +311,7 @@ static struct irq_chip ar71xx_pci_irq_ch
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.irq_mask_ack = ar71xx_pci_irq_mask,
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};
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-static __init void ar71xx_pci_irq_init(void)
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+static __devinit void ar71xx_pci_irq_init(int irq)
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{
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void __iomem *base = ath79_reset_base;
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int i;
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@@ -324,10 +326,10 @@ static __init void ar71xx_pci_irq_init(v
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irq_set_chip_and_handler(i, &ar71xx_pci_irq_chip,
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handle_level_irq);
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- irq_set_chained_handler(ATH79_CPU_IRQ_IP2, ar71xx_pci_irq_handler);
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+ irq_set_chained_handler(irq, ar71xx_pci_irq_handler);
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}
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-static __init void ar71xx_pci_reset(void)
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+static __devinit void ar71xx_pci_reset(void)
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{
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void __iomem *ddr_base = ath79_ddr_base;
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@@ -367,9 +369,59 @@ __init int ar71xx_pcibios_init(void)
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/* clear bus errors */
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ar71xx_pci_check_error(1);
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- ar71xx_pci_irq_init();
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+ ar71xx_pci_irq_init(ATH79_CPU_IRQ_IP2);
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register_pci_controller(&ar71xx_pci_controller);
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return 0;
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}
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+
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+static int __devinit ar71xx_pci_probe(struct platform_device *pdev)
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+{
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+ struct resource *res;
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+ int irq;
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+ u32 t;
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+
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+ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "cfg_base");
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+ if (!res)
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+ return -EINVAL;
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+
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+ ar71xx_pcicfg_base = devm_request_and_ioremap(&pdev->dev, res);
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+ if (!ar71xx_pcicfg_base)
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+ return -ENOMEM;
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+
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+ irq = platform_get_irq(pdev, 0);
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+ if (irq < 0)
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+ return -EINVAL;
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+
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+ ar71xx_pci_reset();
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+
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+ /* setup COMMAND register */
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+ t = PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER | PCI_COMMAND_INVALIDATE
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+ | PCI_COMMAND_PARITY | PCI_COMMAND_SERR | PCI_COMMAND_FAST_BACK;
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+ ar71xx_pci_local_write(PCI_COMMAND, 4, t);
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+
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+ /* clear bus errors */
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+ ar71xx_pci_check_error(1);
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+
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+ ar71xx_pci_irq_init(irq);
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+
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+ register_pci_controller(&ar71xx_pci_controller);
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+
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+ return 0;
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+}
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+
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+static struct platform_driver ar71xx_pci_driver = {
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+ .probe = ar71xx_pci_probe,
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+ .driver = {
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+ .name = "ar71xx-pci",
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+ .owner = THIS_MODULE,
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+ },
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+};
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+
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+static int __init ar71xx_pci_init(void)
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+{
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+ return platform_driver_register(&ar71xx_pci_driver);
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+}
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+
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+postcore_initcall(ar71xx_pci_init);
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