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The NanoPi R2C is a minor variant of NanoPi R2S with the on-board NIC chip changed from rtl8211e to yt8521s, and otherwise identical to R2S. Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
71 lines
2.2 KiB
Diff
71 lines
2.2 KiB
Diff
From 004589ff9df5b75672a78b6c3c4cba93202b14c9 Mon Sep 17 00:00:00 2001
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From: Tianling Shen <cnsztl@gmail.com>
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Date: Sat, 25 Mar 2023 15:40:20 +0800
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Subject: [PATCH] arm64: dts: rockchip: Add FriendlyARM NanoPi R2C
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The NanoPi R2C is a minor variant of NanoPi R2S with the on-board NIC
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chip changed from rtl8211e to yt8521s, and otherwise identical to R2S.
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Signed-off-by: Tianling Shen <cnsztl@gmail.com>
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Link: https://lore.kernel.org/r/20230325074022.9818-3-cnsztl@gmail.com
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Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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---
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arch/arm64/boot/dts/rockchip/Makefile | 1 +
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.../boot/dts/rockchip/rk3328-nanopi-r2c.dts | 40 +++++++++++++++++++
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2 files changed, 41 insertions(+)
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create mode 100644 arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2c.dts
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--- a/arch/arm64/boot/dts/rockchip/Makefile
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+++ b/arch/arm64/boot/dts/rockchip/Makefile
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@@ -9,6 +9,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3318-a9
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3326-odroid-go2.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-a1.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-evb.dtb
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+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-nanopi-r2c.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-nanopi-r2s.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-rock64.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-rock-pi-e.dtb
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--- /dev/null
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+++ b/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2c.dts
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@@ -0,0 +1,40 @@
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+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
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+/*
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+ * Copyright (c) 2021 FriendlyElec Computer Tech. Co., Ltd.
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+ * (http://www.friendlyarm.com)
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+ *
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+ * Copyright (c) 2021-2023 Tianling Shen <cnsztl@gmail.com>
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+ */
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+
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+/dts-v1/;
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+#include "rk3328-nanopi-r2s.dts"
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+
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+/ {
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+ model = "FriendlyElec NanoPi R2C";
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+ compatible = "friendlyarm,nanopi-r2c", "rockchip,rk3328";
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+};
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+
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+&gmac2io {
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+ phy-handle = <&yt8521s>;
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+ tx_delay = <0x22>;
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+ rx_delay = <0x12>;
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+
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+ mdio {
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+ /delete-node/ ethernet-phy@1;
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+
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+ yt8521s: ethernet-phy@3 {
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+ compatible = "ethernet-phy-ieee802.3-c22";
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+ reg = <3>;
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+
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+ motorcomm,clk-out-frequency-hz = <125000000>;
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+ motorcomm,keep-pll-enabled;
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+ motorcomm,auto-sleep-disabled;
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+
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+ pinctrl-0 = <ð_phy_reset_pin>;
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+ pinctrl-names = "default";
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+ reset-assert-us = <10000>;
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+ reset-deassert-us = <50000>;
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+ reset-gpios = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>;
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+ };
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+ };
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+};
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