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https://github.com/openwrt/openwrt.git
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88ba41453d
Refresh patches. Remove upstreamed patches: - backport/080-v4.15-0001-arch-define-weak-abort.patch - backport/081-v4.15-0002-kernel-exit.c-export-abort-to-modules.patch Update patch that no longer applies: pending/493-ubi-set-ROOT_DEV-to-ubiblock-rootfs-if-unset.patch Fixes CVE-2017-8824. Compile-tested: octeon, x86/64. Runtime-tested: octeon, x86/64. Signed-off-by: Stijn Tintel <stijn@linux-ipv6.be>
269 lines
7.2 KiB
Diff
269 lines
7.2 KiB
Diff
--- a/drivers/net/dsa/mt7530.c
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+++ b/drivers/net/dsa/mt7530.c
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@@ -670,6 +670,9 @@ static int
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mt7530_cpu_port_enable(struct mt7530_priv *priv,
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int port)
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{
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+ u8 port_mask = 0;
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+ int i;
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+
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/* Enable Mediatek header mode on the cpu port */
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mt7530_write(priv, MT7530_PVC_P(port),
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PORT_SPEC_TAG);
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@@ -686,8 +689,12 @@ mt7530_cpu_port_enable(struct mt7530_pri
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/* CPU port gets connected to all user ports of
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* the switch
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*/
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+ for (i = 0; i < MT7530_NUM_PORTS; i++)
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+ if ((priv->ds->enabled_port_mask & BIT(i)) &&
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+ (dsa_port_upstream_port(priv->ds, i) == port))
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+ port_mask |= BIT(i);
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mt7530_write(priv, MT7530_PCR_P(port),
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- PCR_MATRIX(priv->ds->enabled_port_mask));
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+ PCR_MATRIX(port_mask));
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return 0;
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}
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@@ -697,6 +704,7 @@ mt7530_port_enable(struct dsa_switch *ds
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struct phy_device *phy)
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{
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struct mt7530_priv *priv = ds->priv;
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+ u8 upstream = dsa_port_upstream_port(ds, port);
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mutex_lock(&priv->reg_mutex);
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@@ -707,7 +715,7 @@ mt7530_port_enable(struct dsa_switch *ds
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* restore the port matrix if the port is the member of a certain
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* bridge.
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*/
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- priv->ports[port].pm |= PCR_MATRIX(BIT(MT7530_CPU_PORT));
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+ priv->ports[port].pm |= PCR_MATRIX(BIT(upstream));
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priv->ports[port].enable = true;
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mt7530_rmw(priv, MT7530_PCR_P(port), PCR_MATRIX_MASK,
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priv->ports[port].pm);
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@@ -770,7 +778,8 @@ mt7530_port_bridge_join(struct dsa_switc
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struct net_device *bridge)
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{
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struct mt7530_priv *priv = ds->priv;
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- u32 port_bitmap = BIT(MT7530_CPU_PORT);
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+ u8 upstream = dsa_port_upstream_port(ds, port);
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+ u32 port_bitmap = BIT(upstream);
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int i;
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mutex_lock(&priv->reg_mutex);
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@@ -808,6 +817,7 @@ mt7530_port_bridge_leave(struct dsa_swit
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struct net_device *bridge)
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{
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struct mt7530_priv *priv = ds->priv;
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+ u8 upstream = dsa_port_upstream_port(ds, port);
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int i;
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mutex_lock(&priv->reg_mutex);
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@@ -832,8 +842,8 @@ mt7530_port_bridge_leave(struct dsa_swit
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*/
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if (priv->ports[port].enable)
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mt7530_rmw(priv, MT7530_PCR_P(port), PCR_MATRIX_MASK,
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- PCR_MATRIX(BIT(MT7530_CPU_PORT)));
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- priv->ports[port].pm = PCR_MATRIX(BIT(MT7530_CPU_PORT));
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+ PCR_MATRIX(BIT(upstream)));
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+ priv->ports[port].pm = PCR_MATRIX(BIT(upstream));
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mutex_unlock(&priv->reg_mutex);
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}
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@@ -908,15 +918,7 @@ err:
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static enum dsa_tag_protocol
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mtk_get_tag_protocol(struct dsa_switch *ds)
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{
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- struct mt7530_priv *priv = ds->priv;
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-
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- if (!dsa_is_cpu_port(ds, MT7530_CPU_PORT)) {
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- dev_warn(priv->dev,
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- "port not matched with tagging CPU port\n");
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- return DSA_TAG_PROTO_NONE;
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- } else {
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- return DSA_TAG_PROTO_MTK;
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- }
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+ return DSA_TAG_PROTO_MTK;
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}
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static int
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@@ -989,7 +991,7 @@ mt7530_setup(struct dsa_switch *ds)
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/* Enable Port 6 only; P5 as GMAC5 which currently is not supported */
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val = mt7530_read(priv, MT7530_MHWTRAP);
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- val &= ~MHWTRAP_P6_DIS & ~MHWTRAP_PHY_ACCESS;
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+ val &= ~MHWTRAP_P5_DIS & ~MHWTRAP_P6_DIS & ~MHWTRAP_PHY_ACCESS;
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val |= MHWTRAP_MANUAL;
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if (!dsa_is_cpu_port(ds, 5)) {
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val |= MHWTRAP_P5_DIS;
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--- a/include/net/dsa.h
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+++ b/include/net/dsa.h
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@@ -185,6 +185,10 @@ struct dsa_port {
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u8 stp_state;
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struct net_device *bridge_dev;
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struct devlink_port devlink_port;
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+
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+ struct net_device *ethernet;
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+ int upstream;
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+
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/*
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* Original copy of the master netdev ethtool_ops
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*/
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@@ -266,6 +270,11 @@ static inline bool dsa_is_normal_port(st
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return !dsa_is_cpu_port(ds, p) && !dsa_is_dsa_port(ds, p);
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}
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+static inline bool dsa_is_upstream_port(struct dsa_switch *ds, int p)
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+{
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+ return dsa_is_cpu_port(ds, p) || dsa_is_dsa_port(ds, p);
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+}
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+
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static inline u8 dsa_upstream_port(struct dsa_switch *ds)
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{
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struct dsa_switch_tree *dst = ds->dst;
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@@ -282,6 +291,18 @@ static inline u8 dsa_upstream_port(struc
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return ds->rtable[dst->cpu_dp->ds->index];
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}
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+static inline u8 dsa_port_upstream_port(struct dsa_switch *ds, int port)
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+{
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+ /*
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+ * If this port has a specific upstream cpu port, use it,
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+ * otherwise use the switch default.
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+ */
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+ if (ds->ports[port].upstream)
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+ return ds->ports[port].upstream;
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+ else
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+ return dsa_upstream_port(ds);
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+}
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+
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typedef int dsa_fdb_dump_cb_t(const unsigned char *addr, u16 vid,
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bool is_static, void *data);
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struct dsa_switch_ops {
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--- a/net/dsa/dsa2.c
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+++ b/net/dsa/dsa2.c
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@@ -253,6 +253,8 @@ static int dsa_cpu_port_apply(struct dsa
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memset(&port->devlink_port, 0, sizeof(port->devlink_port));
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err = devlink_port_register(ds->devlink, &port->devlink_port,
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port->index);
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+ if (port->netdev)
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+ port->netdev->dsa_ptr = ds->dst;
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return err;
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}
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@@ -262,6 +264,12 @@ static void dsa_cpu_port_unapply(struct
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dsa_cpu_dsa_destroy(port);
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port->ds->cpu_port_mask &= ~BIT(port->index);
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+ if (port->netdev)
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+ port->netdev->dsa_ptr = NULL;
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+ if (port->ethernet) {
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+ dev_put(port->ethernet);
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+ port->ethernet = NULL;
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+ }
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}
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static int dsa_user_port_apply(struct dsa_port *port)
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@@ -505,10 +513,9 @@ static int dsa_cpu_parse(struct dsa_port
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dev_put(ethernet_dev);
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}
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- if (!dst->cpu_dp) {
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+ if (!dst->cpu_dp)
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dst->cpu_dp = port;
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- dst->cpu_dp->netdev = ethernet_dev;
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- }
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+ port->netdev = ethernet_dev;
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/* Initialize cpu_port_mask now for drv->setup()
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* to have access to a correct value, just like what
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@@ -526,6 +533,29 @@ static int dsa_cpu_parse(struct dsa_port
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dst->rcv = dst->tag_ops->rcv;
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+ dev_hold(ethernet_dev);
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+ ds->ports[index].ethernet = ethernet_dev;
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+ ds->cpu_port_mask |= BIT(index);
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+
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+ return 0;
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+}
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+
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+static int dsa_user_parse(struct dsa_port *port, u32 index,
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+ struct dsa_switch *ds)
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+{
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+ struct device_node *cpu_port;
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+ const unsigned int *cpu_port_reg;
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+ int cpu_port_index;
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+
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+ cpu_port = of_parse_phandle(port->dn, "cpu", 0);
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+ if (cpu_port) {
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+ cpu_port_reg = of_get_property(cpu_port, "reg", NULL);
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+ if (!cpu_port_reg)
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+ return -EINVAL;
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+ cpu_port_index = be32_to_cpup(cpu_port_reg);
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+ ds->ports[index].upstream = cpu_port_index;
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+ }
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+
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return 0;
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}
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@@ -533,7 +563,7 @@ static int dsa_ds_parse(struct dsa_switc
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{
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struct dsa_port *port;
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u32 index;
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- int err;
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+ int err = 0;
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for (index = 0; index < ds->num_ports; index++) {
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port = &ds->ports[index];
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@@ -546,6 +576,9 @@ static int dsa_ds_parse(struct dsa_switc
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if (err)
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return err;
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} else {
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+ err = dsa_user_parse(port, index, ds);
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+ if (err)
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+ return err;
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/* Initialize enabled_port_mask now for drv->setup()
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* to have access to a correct value, just like what
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* net/dsa/dsa.c::dsa_switch_setup_one does.
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--- a/net/dsa/dsa_priv.h
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+++ b/net/dsa/dsa_priv.h
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@@ -91,6 +91,8 @@ struct dsa_slave_priv {
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/* TC context */
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struct list_head mall_tc_list;
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+
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+ struct net_device *master;
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};
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/* dsa.c */
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@@ -177,6 +179,9 @@ extern const struct dsa_device_ops trail
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static inline struct net_device *dsa_master_netdev(struct dsa_slave_priv *p)
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{
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+ if (p->master)
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+ return p->master;
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+
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return p->dp->cpu_dp->netdev;
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}
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--- a/net/dsa/slave.c
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+++ b/net/dsa/slave.c
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@@ -1257,7 +1257,7 @@ int dsa_slave_create(struct dsa_port *po
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int ret;
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cpu_dp = ds->dst->cpu_dp;
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- master = cpu_dp->netdev;
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+ master = ds->ports[port->upstream].ethernet;
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if (!ds->num_tx_queues)
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ds->num_tx_queues = 1;
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@@ -1295,6 +1295,7 @@ int dsa_slave_create(struct dsa_port *po
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p->dp = port;
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INIT_LIST_HEAD(&p->mall_tc_list);
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p->xmit = dst->tag_ops->xmit;
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+ p->master = master;
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p->old_pause = -1;
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p->old_link = -1;
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