mirror of
https://github.com/openwrt/openwrt.git
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2317a7426e
Build system: x86_64 Build-tested: generic, smp Run-tested: generic/AR-5387un, smp/VR-3032u Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
610 lines
16 KiB
Diff
610 lines
16 KiB
Diff
From bd9c250ef85e6f99aa5d59b21abb87d0a48f2f61 Mon Sep 17 00:00:00 2001
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From: Jonas Gorski <jonas.gorski@gmail.com>
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Date: Fri, 24 Jun 2016 22:20:39 +0200
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Subject: [PATCH 15/16] pinctrl: add a pincontrol driver for BCM6318
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Add a pincontrol driver for BCM6318. BCM6318 allows muxing most GPIOs
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to different functions. BCM6318 is similar to BCM6328 with the addition
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of a pad register, and the GPIO meaning of the mux register changes
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based on the GPIO number.
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Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
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---
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drivers/pinctrl/bcm63xx/Kconfig | 7 +
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drivers/pinctrl/bcm63xx/Makefile | 1 +
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drivers/pinctrl/bcm63xx/pinctrl-bcm6318.c | 564 ++++++++++++++++++++++++++++++
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3 files changed, 572 insertions(+)
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create mode 100644 drivers/pinctrl/bcm63xx/pinctrl-bcm6318.c
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--- a/drivers/pinctrl/bcm63xx/Kconfig
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+++ b/drivers/pinctrl/bcm63xx/Kconfig
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@@ -2,6 +2,13 @@ config PINCTRL_BRCM63XX
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bool
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select GPIO_GENERIC
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+config PINCTRL_BRCM6318
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+ bool "BCM6318 pincontrol driver" if COMPILE_TEST
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+ select PINMUX
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+ select PINCONF
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+ select PINCTRL_BRCM63XX
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+ select GENERIC_PINCONF
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+
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config PINCTRL_BRCM6328
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bool "BCM6328 pincontrol driver" if COMPILE_TEST
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select PINMUX
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--- a/drivers/pinctrl/bcm63xx/Makefile
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+++ b/drivers/pinctrl/bcm63xx/Makefile
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@@ -1,4 +1,5 @@
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obj-$(CONFIG_PINCTRL_BRCM63XX) += pinctrl-bcm63xx.o
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+obj-$(CONFIG_PINCTRL_BRCM6318) += pinctrl-bcm6318.o
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obj-$(CONFIG_PINCTRL_BRCM6328) += pinctrl-bcm6328.o
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obj-$(CONFIG_PINCTRL_BRCM6348) += pinctrl-bcm6348.o
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obj-$(CONFIG_PINCTRL_BRCM6358) += pinctrl-bcm6358.o
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--- /dev/null
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+++ b/drivers/pinctrl/bcm63xx/pinctrl-bcm6318.c
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@@ -0,0 +1,564 @@
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+/*
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+ * This file is subject to the terms and conditions of the GNU General Public
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+ * License. See the file "COPYING" in the main directory of this archive
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+ * for more details.
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+ *
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+ * Copyright (C) 2016 Jonas Gorski <jonas.gorski@gmail.com>
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+ */
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+
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+#include <linux/kernel.h>
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+#include <linux/spinlock.h>
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+#include <linux/bitops.h>
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+#include <linux/gpio.h>
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+#include <linux/gpio/driver.h>
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+#include <linux/of.h>
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+#include <linux/of_gpio.h>
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+#include <linux/slab.h>
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+#include <linux/platform_device.h>
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+
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+#include <linux/pinctrl/pinconf.h>
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+#include <linux/pinctrl/pinconf-generic.h>
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+#include <linux/pinctrl/pinmux.h>
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+#include <linux/pinctrl/machine.h>
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+
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+#include "../core.h"
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+#include "../pinctrl-utils.h"
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+
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+#include "pinctrl-bcm63xx.h"
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+
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+#define BCM6318_NGPIO 50
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+
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+struct bcm6318_pingroup {
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+ const char *name;
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+ const unsigned * const pins;
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+ const unsigned num_pins;
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+};
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+
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+struct bcm6318_function {
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+ const char *name;
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+ const char * const *groups;
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+ const unsigned num_groups;
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+
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+ unsigned mode_val:1;
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+ unsigned mux_val:2;
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+};
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+
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+struct bcm6318_pinctrl {
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+ struct pinctrl_dev *pctldev;
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+ struct pinctrl_desc desc;
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+
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+ void __iomem *mode;
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+ void __iomem *mux[3];
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+ void __iomem *pad[6];
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+
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+ /* register access lock */
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+ spinlock_t lock;
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+
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+ struct gpio_chip gpio[2];
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+};
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+
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+static const struct pinctrl_pin_desc bcm6318_pins[] = {
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+ PINCTRL_PIN(0, "gpio0"),
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+ PINCTRL_PIN(1, "gpio1"),
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+ PINCTRL_PIN(2, "gpio2"),
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+ PINCTRL_PIN(3, "gpio3"),
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+ PINCTRL_PIN(4, "gpio4"),
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+ PINCTRL_PIN(5, "gpio5"),
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+ PINCTRL_PIN(6, "gpio6"),
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+ PINCTRL_PIN(7, "gpio7"),
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+ PINCTRL_PIN(8, "gpio8"),
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+ PINCTRL_PIN(9, "gpio9"),
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+ PINCTRL_PIN(10, "gpio10"),
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+ PINCTRL_PIN(11, "gpio11"),
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+ PINCTRL_PIN(12, "gpio12"),
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+ PINCTRL_PIN(13, "gpio13"),
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+ PINCTRL_PIN(14, "gpio14"),
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+ PINCTRL_PIN(15, "gpio15"),
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+ PINCTRL_PIN(16, "gpio16"),
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+ PINCTRL_PIN(17, "gpio17"),
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+ PINCTRL_PIN(18, "gpio18"),
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+ PINCTRL_PIN(19, "gpio19"),
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+ PINCTRL_PIN(20, "gpio20"),
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+ PINCTRL_PIN(21, "gpio21"),
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+ PINCTRL_PIN(22, "gpio22"),
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+ PINCTRL_PIN(23, "gpio23"),
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+ PINCTRL_PIN(24, "gpio24"),
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+ PINCTRL_PIN(25, "gpio25"),
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+ PINCTRL_PIN(26, "gpio26"),
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+ PINCTRL_PIN(27, "gpio27"),
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+ PINCTRL_PIN(28, "gpio28"),
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+ PINCTRL_PIN(29, "gpio29"),
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+ PINCTRL_PIN(30, "gpio30"),
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+ PINCTRL_PIN(31, "gpio31"),
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+ PINCTRL_PIN(32, "gpio32"),
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+ PINCTRL_PIN(33, "gpio33"),
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+ PINCTRL_PIN(34, "gpio34"),
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+ PINCTRL_PIN(35, "gpio35"),
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+ PINCTRL_PIN(36, "gpio36"),
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+ PINCTRL_PIN(37, "gpio37"),
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+ PINCTRL_PIN(38, "gpio38"),
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+ PINCTRL_PIN(39, "gpio39"),
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+ PINCTRL_PIN(40, "gpio40"),
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+ PINCTRL_PIN(41, "gpio41"),
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+ PINCTRL_PIN(42, "gpio42"),
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+ PINCTRL_PIN(43, "gpio43"),
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+ PINCTRL_PIN(44, "gpio44"),
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+ PINCTRL_PIN(45, "gpio45"),
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+ PINCTRL_PIN(46, "gpio46"),
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+ PINCTRL_PIN(47, "gpio47"),
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+ PINCTRL_PIN(48, "gpio48"),
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+ PINCTRL_PIN(49, "gpio49"),
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+};
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+
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+static unsigned gpio0_pins[] = { 0 };
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+static unsigned gpio1_pins[] = { 1 };
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+static unsigned gpio2_pins[] = { 2 };
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+static unsigned gpio3_pins[] = { 3 };
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+static unsigned gpio4_pins[] = { 4 };
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+static unsigned gpio5_pins[] = { 5 };
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+static unsigned gpio6_pins[] = { 6 };
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+static unsigned gpio7_pins[] = { 7 };
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+static unsigned gpio8_pins[] = { 8 };
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+static unsigned gpio9_pins[] = { 9 };
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+static unsigned gpio10_pins[] = { 10 };
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+static unsigned gpio11_pins[] = { 11 };
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+static unsigned gpio12_pins[] = { 12 };
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+static unsigned gpio13_pins[] = { 13 };
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+static unsigned gpio14_pins[] = { 14 };
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+static unsigned gpio15_pins[] = { 15 };
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+static unsigned gpio16_pins[] = { 16 };
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+static unsigned gpio17_pins[] = { 17 };
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+static unsigned gpio18_pins[] = { 18 };
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+static unsigned gpio19_pins[] = { 19 };
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+static unsigned gpio20_pins[] = { 20 };
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+static unsigned gpio21_pins[] = { 21 };
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+static unsigned gpio22_pins[] = { 22 };
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+static unsigned gpio23_pins[] = { 23 };
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+static unsigned gpio24_pins[] = { 24 };
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+static unsigned gpio25_pins[] = { 25 };
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+static unsigned gpio26_pins[] = { 26 };
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+static unsigned gpio27_pins[] = { 27 };
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+static unsigned gpio28_pins[] = { 28 };
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+static unsigned gpio29_pins[] = { 29 };
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+static unsigned gpio30_pins[] = { 30 };
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+static unsigned gpio31_pins[] = { 31 };
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+static unsigned gpio32_pins[] = { 32 };
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+static unsigned gpio33_pins[] = { 33 };
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+static unsigned gpio34_pins[] = { 34 };
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+static unsigned gpio35_pins[] = { 35 };
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+static unsigned gpio36_pins[] = { 36 };
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+static unsigned gpio37_pins[] = { 37 };
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+static unsigned gpio38_pins[] = { 38 };
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+static unsigned gpio39_pins[] = { 39 };
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+static unsigned gpio40_pins[] = { 40 };
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+static unsigned gpio41_pins[] = { 41 };
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+static unsigned gpio42_pins[] = { 42 };
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+static unsigned gpio43_pins[] = { 43 };
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+static unsigned gpio44_pins[] = { 44 };
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+static unsigned gpio45_pins[] = { 45 };
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+static unsigned gpio46_pins[] = { 46 };
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+static unsigned gpio47_pins[] = { 47 };
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+static unsigned gpio48_pins[] = { 48 };
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+static unsigned gpio49_pins[] = { 49 };
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+
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+#define BCM6318_GROUP(n) \
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+ { \
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+ .name = #n, \
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+ .pins = n##_pins, \
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+ .num_pins = ARRAY_SIZE(n##_pins), \
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+ }
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+
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+static struct bcm6318_pingroup bcm6318_groups[] = {
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+ BCM6318_GROUP(gpio0),
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+ BCM6318_GROUP(gpio1),
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+ BCM6318_GROUP(gpio2),
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+ BCM6318_GROUP(gpio3),
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+ BCM6318_GROUP(gpio4),
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+ BCM6318_GROUP(gpio5),
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+ BCM6318_GROUP(gpio6),
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+ BCM6318_GROUP(gpio7),
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+ BCM6318_GROUP(gpio8),
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+ BCM6318_GROUP(gpio9),
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+ BCM6318_GROUP(gpio10),
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+ BCM6318_GROUP(gpio11),
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+ BCM6318_GROUP(gpio12),
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+ BCM6318_GROUP(gpio13),
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+ BCM6318_GROUP(gpio14),
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+ BCM6318_GROUP(gpio15),
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+ BCM6318_GROUP(gpio16),
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+ BCM6318_GROUP(gpio17),
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+ BCM6318_GROUP(gpio18),
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+ BCM6318_GROUP(gpio19),
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+ BCM6318_GROUP(gpio20),
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+ BCM6318_GROUP(gpio21),
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+ BCM6318_GROUP(gpio22),
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+ BCM6318_GROUP(gpio23),
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+ BCM6318_GROUP(gpio24),
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+ BCM6318_GROUP(gpio25),
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+ BCM6318_GROUP(gpio26),
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+ BCM6318_GROUP(gpio27),
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+ BCM6318_GROUP(gpio28),
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+ BCM6318_GROUP(gpio29),
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+ BCM6318_GROUP(gpio30),
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+ BCM6318_GROUP(gpio31),
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+ BCM6318_GROUP(gpio32),
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+ BCM6318_GROUP(gpio33),
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+ BCM6318_GROUP(gpio34),
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+ BCM6318_GROUP(gpio35),
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+ BCM6318_GROUP(gpio36),
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+ BCM6318_GROUP(gpio37),
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+ BCM6318_GROUP(gpio38),
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+ BCM6318_GROUP(gpio39),
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+ BCM6318_GROUP(gpio40),
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+ BCM6318_GROUP(gpio41),
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+ BCM6318_GROUP(gpio42),
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+ BCM6318_GROUP(gpio43),
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+ BCM6318_GROUP(gpio44),
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+ BCM6318_GROUP(gpio45),
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+ BCM6318_GROUP(gpio46),
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+ BCM6318_GROUP(gpio47),
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+ BCM6318_GROUP(gpio48),
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+ BCM6318_GROUP(gpio49),
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+};
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+
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+/* GPIO_MODE */
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+static const char * const led_groups[] = {
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+ "gpio0",
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+ "gpio1",
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+ "gpio2",
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+ "gpio3",
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+ "gpio4",
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+ "gpio5",
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+ "gpio6",
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+ "gpio7",
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+ "gpio8",
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+ "gpio9",
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+ "gpio10",
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+ "gpio11",
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+ "gpio12",
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+ "gpio13",
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+ "gpio14",
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+ "gpio15",
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+ "gpio16",
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+ "gpio17",
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+ "gpio18",
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+ "gpio19",
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+ "gpio20",
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+ "gpio21",
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+ "gpio22",
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+ "gpio23",
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+};
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+
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+/* PINMUX_SEL */
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+static const char * const ephy0_spd_led_groups[] = {
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+ "gpio0",
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+};
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+
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+static const char * const ephy1_spd_led_groups[] = {
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+ "gpio1",
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+};
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+
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+static const char * const ephy2_spd_led_groups[] = {
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+ "gpio2",
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+};
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+
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+static const char * const ephy3_spd_led_groups[] = {
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+ "gpio3",
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+};
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+
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+static const char * const ephy0_act_led_groups[] = {
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+ "gpio4",
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+};
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+
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+static const char * const ephy1_act_led_groups[] = {
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+ "gpio5",
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+};
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+
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+static const char * const ephy2_act_led_groups[] = {
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+ "gpio6",
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+};
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+
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+static const char * const ephy3_act_led_groups[] = {
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+ "gpio7",
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+};
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+
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+static const char * const serial_led_data_groups[] = {
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+ "gpio6",
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+};
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+
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+static const char * const serial_led_clk_groups[] = {
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+ "gpio7",
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+};
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+
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+static const char * const inet_act_led_groups[] = {
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+ "gpio8",
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+};
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+
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+static const char * const inet_fail_led_groups[] = {
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+ "gpio9",
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+};
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+
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+static const char * const dsl_led_groups[] = {
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+ "gpio10",
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+};
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+
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+static const char * const post_fail_led_groups[] = {
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+ "gpio11",
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+};
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+
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+static const char * const wlan_wps_led_groups[] = {
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+ "gpio12",
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+};
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+
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+static const char * const usb_pwron_groups[] = {
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+ "gpio13",
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+};
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+
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+static const char * const usb_device_led_groups[] = {
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+ "gpio13",
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+};
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+
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+static const char * const usb_active_groups[] = {
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+ "gpio40",
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+};
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+
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+#define BCM6318_MODE_FUN(n) \
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+ { \
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+ .name = #n, \
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+ .groups = n##_groups, \
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+ .num_groups = ARRAY_SIZE(n##_groups), \
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+ .mode_val = 1, \
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+ }
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+
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+#define BCM6318_MUX_FUN(n, mux) \
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+ { \
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+ .name = #n, \
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+ .groups = n##_groups, \
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+ .num_groups = ARRAY_SIZE(n##_groups), \
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+ .mux_val = mux, \
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+ }
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+
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+static const struct bcm6318_function bcm6318_funcs[] = {
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+ BCM6318_MODE_FUN(led),
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+ BCM6318_MUX_FUN(ephy0_spd_led, 1),
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+ BCM6318_MUX_FUN(ephy1_spd_led, 1),
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+ BCM6318_MUX_FUN(ephy2_spd_led, 1),
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+ BCM6318_MUX_FUN(ephy3_spd_led, 1),
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+ BCM6318_MUX_FUN(ephy0_act_led, 1),
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+ BCM6318_MUX_FUN(ephy1_act_led, 1),
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+ BCM6318_MUX_FUN(ephy2_act_led, 1),
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+ BCM6318_MUX_FUN(ephy3_act_led, 1),
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+ BCM6318_MUX_FUN(serial_led_data, 3),
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+ BCM6318_MUX_FUN(serial_led_clk, 3),
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+ BCM6318_MUX_FUN(inet_act_led, 1),
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+ BCM6318_MUX_FUN(inet_fail_led, 1),
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+ BCM6318_MUX_FUN(dsl_led, 1),
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+ BCM6318_MUX_FUN(post_fail_led, 1),
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+ BCM6318_MUX_FUN(wlan_wps_led, 1),
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+ BCM6318_MUX_FUN(usb_pwron, 1),
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+ BCM6318_MUX_FUN(usb_device_led, 2),
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+ BCM6318_MUX_FUN(usb_active, 2),
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+};
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+
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+static int bcm6318_pinctrl_get_group_count(struct pinctrl_dev *pctldev)
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+{
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+ return ARRAY_SIZE(bcm6318_groups);
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+}
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+
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+static const char *bcm6318_pinctrl_get_group_name(struct pinctrl_dev *pctldev,
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+ unsigned group)
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+{
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+ return bcm6318_groups[group].name;
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+}
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+
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+static int bcm6318_pinctrl_get_group_pins(struct pinctrl_dev *pctldev,
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+ unsigned group, const unsigned **pins,
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+ unsigned *num_pins)
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+{
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+ *pins = bcm6318_groups[group].pins;
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+ *num_pins = bcm6318_groups[group].num_pins;
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+
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+ return 0;
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+}
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+
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+static int bcm6318_pinctrl_get_func_count(struct pinctrl_dev *pctldev)
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+{
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+ return ARRAY_SIZE(bcm6318_funcs);
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+}
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+
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+static const char *bcm6318_pinctrl_get_func_name(struct pinctrl_dev *pctldev,
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+ unsigned selector)
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+{
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+ return bcm6318_funcs[selector].name;
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+}
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+
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+static int bcm6318_pinctrl_get_groups(struct pinctrl_dev *pctldev,
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+ unsigned selector,
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+ const char * const **groups,
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+ unsigned * const num_groups)
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+{
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+ *groups = bcm6318_funcs[selector].groups;
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+ *num_groups = bcm6318_funcs[selector].num_groups;
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+
|
|
+ return 0;
|
|
+}
|
|
+
|
|
+static void bcm6318_rmw_mux(struct bcm6318_pinctrl *pctl, unsigned pin,
|
|
+ u32 mode, u32 mux)
|
|
+{
|
|
+ unsigned long flags;
|
|
+ u32 reg;
|
|
+
|
|
+ spin_lock_irqsave(&pctl->lock, flags);
|
|
+ if (pin < 32) {
|
|
+ reg = __raw_readl(pctl->mode);
|
|
+ reg &= ~BIT(pin);
|
|
+ if (mode)
|
|
+ reg |= BIT(pin);
|
|
+ __raw_writel(reg, pctl->mode);
|
|
+ }
|
|
+
|
|
+ if (pin < 48) {
|
|
+ reg = __raw_readl(pctl->mux[pin / 16]);
|
|
+ reg &= ~(3UL << ((pin % 16) * 2));
|
|
+ reg |= mux << ((pin % 16) * 2);
|
|
+ __raw_writel(reg, pctl->mux[pin / 16]);
|
|
+ }
|
|
+ spin_unlock_irqrestore(&pctl->lock, flags);
|
|
+}
|
|
+
|
|
+static void bcm6318_set_pad(struct bcm6318_pinctrl *pctl, unsigned pin, u8 val)
|
|
+{
|
|
+ unsigned long flags;
|
|
+ u32 reg;
|
|
+
|
|
+ spin_lock_irqsave(&pctl->lock, flags);
|
|
+ reg = __raw_readl(pctl->pad[pin / 8]);
|
|
+ reg &= ~(0xfUL << ((pin % 8) * 4));
|
|
+ reg |= val << ((pin % 8) * 4);
|
|
+ __raw_writel(reg, pctl->pad[pin / 8]);
|
|
+ spin_unlock_irqrestore(&pctl->lock, flags);
|
|
+}
|
|
+
|
|
+static int bcm6318_pinctrl_set_mux(struct pinctrl_dev *pctldev,
|
|
+ unsigned selector, unsigned group)
|
|
+{
|
|
+ struct bcm6318_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
|
|
+ const struct bcm6318_pingroup *grp = &bcm6318_groups[group];
|
|
+ const struct bcm6318_function *f = &bcm6318_funcs[selector];
|
|
+
|
|
+ bcm6318_rmw_mux(pctl, grp->pins[0], f->mode_val, f->mux_val);
|
|
+
|
|
+ return 0;
|
|
+}
|
|
+
|
|
+static int bcm6318_gpio_request_enable(struct pinctrl_dev *pctldev,
|
|
+ struct pinctrl_gpio_range *range,
|
|
+ unsigned offset)
|
|
+{
|
|
+ struct bcm6318_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
|
|
+
|
|
+ /* disable all functions using this pin */
|
|
+ if (offset < 13) {
|
|
+ /* GPIOs 0-12 use mux 0 as GPIO function */
|
|
+ bcm6318_rmw_mux(pctl, offset, 0, 0);
|
|
+ } else if (offset < 42) {
|
|
+ /* GPIOs 13-41 use mux 3 as GPIO function */
|
|
+ bcm6318_rmw_mux(pctl, offset, 0, 3);
|
|
+
|
|
+ /* FIXME: revert to old value for non gpio? */
|
|
+ bcm6318_set_pad(pctl, offset, 0);
|
|
+ } else {
|
|
+ /* no idea, really */
|
|
+ }
|
|
+
|
|
+ return 0;
|
|
+}
|
|
+
|
|
+static struct pinctrl_ops bcm6318_pctl_ops = {
|
|
+ .get_groups_count = bcm6318_pinctrl_get_group_count,
|
|
+ .get_group_name = bcm6318_pinctrl_get_group_name,
|
|
+ .get_group_pins = bcm6318_pinctrl_get_group_pins,
|
|
+#ifdef CONFIG_OF
|
|
+ .dt_node_to_map = pinconf_generic_dt_node_to_map_pin,
|
|
+ .dt_free_map = pinctrl_utils_free_map,
|
|
+#endif
|
|
+};
|
|
+
|
|
+static struct pinmux_ops bcm6318_pmx_ops = {
|
|
+ .get_functions_count = bcm6318_pinctrl_get_func_count,
|
|
+ .get_function_name = bcm6318_pinctrl_get_func_name,
|
|
+ .get_function_groups = bcm6318_pinctrl_get_groups,
|
|
+ .set_mux = bcm6318_pinctrl_set_mux,
|
|
+ .gpio_request_enable = bcm6318_gpio_request_enable,
|
|
+ .strict = true,
|
|
+};
|
|
+
|
|
+static int bcm6318_pinctrl_probe(struct platform_device *pdev)
|
|
+{
|
|
+ struct bcm6318_pinctrl *pctl;
|
|
+ struct resource *res;
|
|
+ void __iomem *mode, *mux, *pad;
|
|
+ unsigned i;
|
|
+
|
|
+ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mode");
|
|
+ mode = devm_ioremap_resource(&pdev->dev, res);
|
|
+ if (IS_ERR(mode))
|
|
+ return PTR_ERR(mode);
|
|
+
|
|
+ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mux");
|
|
+ mux = devm_ioremap_resource(&pdev->dev, res);
|
|
+ if (IS_ERR(mux))
|
|
+ return PTR_ERR(mux);
|
|
+
|
|
+ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "pad");
|
|
+ pad = devm_ioremap_resource(&pdev->dev, res);
|
|
+ if (IS_ERR(pad))
|
|
+ return PTR_ERR(pad);
|
|
+
|
|
+ pctl = devm_kzalloc(&pdev->dev, sizeof(*pctl), GFP_KERNEL);
|
|
+ if (!pctl)
|
|
+ return -ENOMEM;
|
|
+
|
|
+ spin_lock_init(&pctl->lock);
|
|
+
|
|
+ pctl->mode = mode;
|
|
+
|
|
+ for (i = 0; i < 3; i++)
|
|
+ pctl->mux[i] = mux + (i * 4);
|
|
+
|
|
+ for (i = 0; i < 6; i++)
|
|
+ pctl->pad[i] = pad + (i * 4);
|
|
+
|
|
+ pctl->desc.name = dev_name(&pdev->dev);
|
|
+ pctl->desc.owner = THIS_MODULE;
|
|
+ pctl->desc.pctlops = &bcm6318_pctl_ops;
|
|
+ pctl->desc.pmxops = &bcm6318_pmx_ops;
|
|
+
|
|
+ pctl->desc.npins = ARRAY_SIZE(bcm6318_pins);
|
|
+ pctl->desc.pins = bcm6318_pins;
|
|
+
|
|
+ platform_set_drvdata(pdev, pctl);
|
|
+
|
|
+ pctl->pctldev = bcm63xx_pinctrl_register(pdev, &pctl->desc, pctl,
|
|
+ pctl->gpio, BCM6318_NGPIO);
|
|
+ if (IS_ERR(pctl->pctldev))
|
|
+ return PTR_ERR(pctl->pctldev);
|
|
+
|
|
+ return 0;
|
|
+}
|
|
+
|
|
+static const struct of_device_id bcm6318_pinctrl_match[] = {
|
|
+ { .compatible = "brcm,bcm6318-pinctrl", },
|
|
+ { },
|
|
+};
|
|
+
|
|
+static struct platform_driver bcm6318_pinctrl_driver = {
|
|
+ .probe = bcm6318_pinctrl_probe,
|
|
+ .driver = {
|
|
+ .name = "bcm6318-pinctrl",
|
|
+ .of_match_table = bcm6318_pinctrl_match,
|
|
+ },
|
|
+};
|
|
+
|
|
+builtin_platform_driver(bcm6318_pinctrl_driver);
|