openwrt/target/linux/ramips/dts/HC5962.dts
L. D. Pinney 45dbd65850 ramips: mt7621: add compatible strings
Add compatible strings to all mt7621 based device tree source files to
fix formal issues.

Signed-off-by: L. D. Pinney <ldpinney@gmail.com>
2017-07-29 09:24:32 +02:00

149 lines
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/dts-v1/;
#include "mt7621.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
/ {
compatible = "hiwifi,hc5962", "mediatek,mt7621-soc";
model = "HiWiFi HC5962";
memory@0 {
device_type = "memory";
reg = <0x0 0x10000000>;
};
chosen {
bootargs = "console=ttyS0,115200";
};
gpio-leds {
compatible = "gpio-leds";
status {
label = "hc5962:white:status";
gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
};
system {
label = "hc5962:red:system";
gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
};
};
gpio-keys-polled {
compatible = "gpio-keys-polled";
#address-cells = <1>;
#size-cells = <0>;
poll-interval = <20>;
reset {
label = "reset";
gpios = <&gpio0 18 GPIO_ACTIVE_HIGH>;
linux,code = <KEY_RESTART>;
};
};
};
&nand {
status = "okay";
partition@0 {
label = "u-boot";
reg = <0x0 0x80000>;
read-only;
};
partition@80000 {
label = "debug";
reg = <0x80000 0x80000>;
read-only;
};
factory: partition@100000 {
label = "factory";
reg = <0x100000 0x40000>;
read-only;
};
partition@140000 {
label = "kernel";
reg = <0x140000 0x200000>;
};
partition@340000 {
label = "ubi";
reg = <0x340000 0x1E00000>;
};
partition@2140000 {
label = "hw_panic";
reg = <0x2140000 0x80000>;
read-only;
};
partition@21c0000 {
label = "bdinfo";
reg = <0x21c0000 0x80000>;
read-only;
};
partition@2240000 {
label = "backup";
reg = <0x2240000 0x80000>;
read-only;
};
partition@22c0000 {
label = "overly";
reg = <0x22c0000 0x1000000>;
};
partition@32c0000 {
label = "firmware_backup";
reg = <0x32c0000 0x2000000>;
};
partition@52c0000 {
label = "oem";
reg = <0x52c0000 0x200000>;
};
partition@54c0000 {
label = "opt";
reg = <0x54c0000 0x2ac0000>;
};
};
&pcie {
status = "okay";
pcie0 {
mt76@0,0 {
reg = <0x0000 0 0 0 0>;
device_type = "pci";
mediatek,mtd-eeprom = <&factory 0x0000>;
ieee80211-freq-limit = <2400000 2500000>;
};
};
pcie1 {
mt76@1,0 {
reg = <0x0000 0 0 0 0>;
device_type = "pci";
mediatek,mtd-eeprom = <&factory 0x8000>;
ieee80211-freq-limit = <5000000 6000000>;
};
};
};
&pinctrl {
state_default: pinctrl0 {
gpio {
ralink,group = "uart3", "jtag";
ralink,function = "gpio";
};
};
};