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8c405cdccc
The patches were generated from the RPi repo with the following command: git format-patch v6.6.34..rpi-6.1.y Some patches needed rebasing and, as usual, the applied and reverted, wireless drivers, Github workflows, READMEs and defconfigs patches were removed. Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
49 lines
1.8 KiB
Diff
49 lines
1.8 KiB
Diff
From afee12219e87d273aacd9db6919ef649970dce0d Mon Sep 17 00:00:00 2001
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From: Dave Stevenson <dave.stevenson@raspberrypi.com>
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Date: Tue, 9 Jan 2024 17:37:00 +0000
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Subject: [PATCH 1060/1085] drm/bridge: tc358762: Program the DPI mode into the
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chip
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The autodetection of resolution/timing by the TC358762 can lead
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to the display being shifted by a pixel or two.
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Program the TC358762 with the requested mode timing so that
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it can reproduce it accurately.
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Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
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---
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drivers/gpu/drm/bridge/tc358762.c | 15 +++++++++++++++
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1 file changed, 15 insertions(+)
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--- a/drivers/gpu/drm/bridge/tc358762.c
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+++ b/drivers/gpu/drm/bridge/tc358762.c
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@@ -53,6 +53,12 @@
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#define LCDCTRL_VSPOL BIT(19) /* Polarity of VSYNC signal */
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#define LCDCTRL_VSDELAY(v) (((v) & 0xfff) << 20) /* VSYNC delay */
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+/* First parameter is in the 16bits, second is in the top 16bits */
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+#define LCD_HS_HBP 0x0424
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+#define LCD_HDISP_HFP 0x0428
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+#define LCD_VS_VBP 0x042c
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+#define LCD_VDISP_VFP 0x0430
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+
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/* SPI Master Registers */
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#define SPICMR 0x0450
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#define SPITCR 0x0454
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@@ -139,6 +145,15 @@ static int tc358762_init(struct tc358762
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tc358762_write(ctx, LCDCTRL, lcdctrl);
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tc358762_write(ctx, SYSCTRL, 0x040f);
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+
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+ tc358762_write(ctx, LCD_HS_HBP, (ctx->mode.hsync_end - ctx->mode.hsync_start) |
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+ ((ctx->mode.htotal - ctx->mode.hsync_end) << 16));
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+ tc358762_write(ctx, LCD_HDISP_HFP, ctx->mode.hdisplay |
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+ ((ctx->mode.hsync_start - ctx->mode.hdisplay) << 16));
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+ tc358762_write(ctx, LCD_VS_VBP, (ctx->mode.vsync_end - ctx->mode.vsync_start) |
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+ ((ctx->mode.vtotal - ctx->mode.vsync_end) << 16));
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+ tc358762_write(ctx, LCD_VDISP_VFP, ctx->mode.vdisplay |
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+ ((ctx->mode.vsync_start - ctx->mode.vdisplay) << 16));
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msleep(100);
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tc358762_write(ctx, PPI_STARTPPI, PPI_START_FUNCTION);
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