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ec6293febc
Ran update_kernel.sh in a fresh clone without any existing toolchains.
Manually rebased:
pending-5.4/611-netfilter_match_bypass_default_table.patch
The upstream change affecting this patch is the revert of an earlier
kernel commit. Therefore, we just revert our corresponding changes
in [1].
Build system: x86_64
Build-tested: ipq806x/R7800
[1] 9b1b89229f ("kernel: bump 5.4 to 5.4.86")
Signed-off-by: John Audia <graysky@archlinux.us>
[adjust manually rebased patch, add explanation]
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
315 lines
6.4 KiB
Diff
315 lines
6.4 KiB
Diff
From 314a3a062e5e8fe76b3c43a8731ffe4bd58bc1be Mon Sep 17 00:00:00 2001
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From: Yuantian Tang <andy.tang@nxp.com>
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Date: Mon, 5 Nov 2018 17:40:20 +0800
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Subject: [PATCH] arm64: dts: nxp: add more thermal zone support
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To enable all the supported thermal sensors, add sensor id information
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to thermal zone node.
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Dts for ls1012a, ls1046a, ls1043a, ls1088a are updated.
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Signed-off-by: Yuantian Tang <andy.tang@nxp.com>
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---
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arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi | 39 ++++------------
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arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi | 61 ++++++++++++--------------
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arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi | 57 ++++++++++--------------
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arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi | 53 +++++++---------------
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4 files changed, 75 insertions(+), 135 deletions(-)
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--- a/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi
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+++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi
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@@ -28,7 +28,7 @@
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#address-cells = <1>;
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#size-cells = <0>;
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- cpu0: cpu@0 {
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+ cooling_map0: cpu0: cpu@0 {
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device_type = "cpu";
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compatible = "arm,cortex-a53";
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reg = <0x0>;
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@@ -100,36 +100,7 @@
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mask = <0x02>;
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};
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- thermal-zones {
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- cpu_thermal: cpu-thermal {
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- polling-delay-passive = <1000>;
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- polling-delay = <5000>;
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- thermal-sensors = <&tmu 0>;
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-
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- trips {
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- cpu_alert: cpu-alert {
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- temperature = <85000>;
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- hysteresis = <2000>;
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- type = "passive";
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- };
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-
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- cpu_crit: cpu-crit {
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- temperature = <95000>;
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- hysteresis = <2000>;
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- type = "critical";
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- };
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- };
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-
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- cooling-maps {
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- map0 {
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- trip = <&cpu_alert>;
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- cooling-device =
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- <&cpu0 THERMAL_NO_LIMIT
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- THERMAL_NO_LIMIT>;
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- };
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- };
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- };
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- };
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+ #include "fsl-tmu.dtsi"
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soc {
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compatible = "simple-bus";
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@@ -573,3 +544,9 @@
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};
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};
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};
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+
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+&thermal_zones {
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+ thermal-zone0 {
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+ status = "okay";
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+ };
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+};
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--- a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
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+++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi
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@@ -39,7 +39,7 @@
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*
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* Currently supported enable-method is psci v0.2
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*/
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- cpu0: cpu@0 {
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+ cooling_map0: cpu0: cpu@0 {
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device_type = "cpu";
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compatible = "arm,cortex-a53";
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reg = <0x0>;
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@@ -148,38 +148,7 @@
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mask = <0x02>;
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};
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- thermal-zones {
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- cpu_thermal: cpu-thermal {
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- polling-delay-passive = <1000>;
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- polling-delay = <5000>;
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-
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- thermal-sensors = <&tmu 3>;
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-
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- trips {
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- cpu_alert: cpu-alert {
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- temperature = <85000>;
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- hysteresis = <2000>;
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- type = "passive";
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- };
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- cpu_crit: cpu-crit {
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- temperature = <95000>;
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- hysteresis = <2000>;
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- type = "critical";
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- };
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- };
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-
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- cooling-maps {
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- map0 {
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- trip = <&cpu_alert>;
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- cooling-device =
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- <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
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- <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
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- <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
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- <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
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- };
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- };
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- };
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- };
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+ #include "fsl-tmu.dtsi"
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timer {
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compatible = "arm,armv8-timer";
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@@ -916,3 +885,29 @@
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#include "qoriq-qman-portals.dtsi"
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#include "qoriq-bman-portals.dtsi"
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+
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+&thermal_zones {
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+ thermal-zone0 {
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+ status = "okay";
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+ };
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+
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+ thermal-zone1 {
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+ status = "okay";
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+ };
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+
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+ thermal-zone2 {
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+ status = "okay";
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+ };
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+
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+ thermal-zone3 {
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+ status = "okay";
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+ };
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+
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+ thermal-zone4 {
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+ status = "okay";
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+ };
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+
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+ thermal-zone5 {
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+ status = "okay";
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+ };
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+};
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--- a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
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+++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
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@@ -34,7 +34,7 @@
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#address-cells = <1>;
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#size-cells = <0>;
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- cpu0: cpu@0 {
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+ cooling_map0: cpu0: cpu@0 {
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device_type = "cpu";
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compatible = "arm,cortex-a72";
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reg = <0x0>;
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@@ -116,38 +116,7 @@
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mask = <0x02>;
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};
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- thermal-zones {
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- cpu_thermal: cpu-thermal {
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- polling-delay-passive = <1000>;
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- polling-delay = <5000>;
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- thermal-sensors = <&tmu 3>;
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-
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- trips {
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- cpu_alert: cpu-alert {
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- temperature = <85000>;
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- hysteresis = <2000>;
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- type = "passive";
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- };
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-
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- cpu_crit: cpu-crit {
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- temperature = <95000>;
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- hysteresis = <2000>;
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- type = "critical";
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- };
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- };
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-
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- cooling-maps {
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- map0 {
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- trip = <&cpu_alert>;
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- cooling-device =
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- <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
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- <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
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- <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
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- <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
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- };
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- };
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- };
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- };
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+ #include "fsl-tmu.dtsi"
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timer {
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compatible = "arm,armv8-timer";
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@@ -883,3 +852,25 @@
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#include "qoriq-qman-portals.dtsi"
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#include "qoriq-bman-portals.dtsi"
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+
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+&thermal_zones {
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+ thermal-zone0 {
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+ status = "okay";
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+ };
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+
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+ thermal-zone1 {
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+ status = "okay";
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+ };
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+
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+ thermal-zone2 {
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+ status = "okay";
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+ };
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+
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+ thermal-zone3 {
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+ status = "okay";
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+ };
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+
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+ thermal-zone4 {
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+ status = "okay";
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+ };
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+};
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--- a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
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+++ b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi
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@@ -25,7 +25,7 @@
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#size-cells = <0>;
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/* We have 2 clusters having 4 Cortex-A53 cores each */
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- cpu0: cpu@0 {
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+ cooling_map0: cpu0: cpu@0 {
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device_type = "cpu";
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compatible = "arm,cortex-a53";
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reg = <0x0>;
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@@ -61,7 +61,7 @@
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#cooling-cells = <2>;
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};
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- cpu4: cpu@100 {
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+ cooling_map1: cpu4: cpu@100 {
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device_type = "cpu";
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compatible = "arm,cortex-a53";
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reg = <0x100>;
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@@ -128,42 +128,7 @@
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};
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};
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- thermal-zones {
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- cpu_thermal: cpu-thermal {
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- polling-delay-passive = <1000>;
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- polling-delay = <5000>;
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- thermal-sensors = <&tmu 0>;
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-
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- trips {
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- cpu_alert: cpu-alert {
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- temperature = <85000>;
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- hysteresis = <2000>;
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- type = "passive";
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- };
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-
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- cpu_crit: cpu-crit {
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- temperature = <95000>;
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- hysteresis = <2000>;
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- type = "critical";
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- };
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- };
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-
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- cooling-maps {
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- map0 {
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- trip = <&cpu_alert>;
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- cooling-device =
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- <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
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- <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
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- <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
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- <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
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- <&cpu4 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
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- <&cpu5 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
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- <&cpu6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
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- <&cpu7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
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- };
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- };
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- };
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- };
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+ #include "fsl-tmu.dtsi"
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timer {
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compatible = "arm,armv8-timer";
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@@ -879,3 +844,15 @@
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};
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};
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};
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+
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+#include "fsl-tmu-map1.dtsi"
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+
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+&thermal_zones {
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+ thermal-zone0 {
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+ status = "okay";
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+ };
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+
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+ thermal-zone1 {
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+ status = "okay";
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+ };
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+};
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