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PMD Global Transmit Disable bit should be cleared for normal operation. This should be HW default, however I found that on Asus RT-AX89X that uses AQR113C PHY and firmware 5.4 this bit is set by default. With this bit set the AQR cannot achieve a link with its link-partner and it took me multiple hours of digging through the vendor GPL source to find this out, so lets always clear this bit during .config_init() to avoid a situation like this in the future. aqr107_wait_processor_intensive_op() is moved up because datasheet notes that any changes to this bit are processor intensive. This is a modified version of patch that got merged upstream as AQR113C has a separate config_init() upstream. Link: https://github.com/openwrt/openwrt/pull/15840 Signed-off-by: Robert Marko <robimarko@gmail.com>
64 lines
2.0 KiB
Diff
64 lines
2.0 KiB
Diff
From 3b92ee7b7899b6beffb2b484c58326e36612a873 Mon Sep 17 00:00:00 2001
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From: Daniel Golle <daniel@makrotopia.org>
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Date: Thu, 23 Dec 2021 14:52:56 +0000
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Subject: [PATCH] net: phy: aquantia: add PHY_ID for AQR112R
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As advised by Ian Chang this PHY is used in Puzzle devices.
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Signed-off-by: Daniel Golle <daniel@makrotopia.org>
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---
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drivers/net/phy/aquantia/aquantia_main.c | 10 ++++++++++
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1 file changed, 10 insertions(+)
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--- a/drivers/net/phy/aquantia/aquantia_main.c
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+++ b/drivers/net/phy/aquantia/aquantia_main.c
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@@ -30,6 +30,8 @@
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#define PHY_ID_AQR113C 0x31c31c12
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#define PHY_ID_AQR114C 0x31c31c22
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#define PHY_ID_AQR813 0x31c31cb2
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+#define PHY_ID_AQR112C 0x03a1b790
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+#define PHY_ID_AQR112R 0x31c31d12
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#define MDIO_PHYXS_VEND_IF_STATUS 0xe812
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#define MDIO_PHYXS_VEND_IF_STATUS_TYPE_MASK GENMASK(7, 3)
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@@ -1023,6 +1025,30 @@ static struct phy_driver aqr_driver[] =
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.led_hw_control_get = aqr_phy_led_hw_control_get,
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.led_polarity_set = aqr_phy_led_polarity_set,
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},
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+{
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+ PHY_ID_MATCH_MODEL(PHY_ID_AQR112C),
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+ .name = "Aquantia AQR112C",
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+ .probe = aqr107_probe,
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+ .config_aneg = aqr_config_aneg_set_prot,
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+ .config_intr = aqr_config_intr,
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+ .handle_interrupt = aqr_handle_interrupt,
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+ .read_status = aqr107_read_status,
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+ .get_sset_count = aqr107_get_sset_count,
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+ .get_strings = aqr107_get_strings,
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+ .get_stats = aqr107_get_stats,
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+},
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+{
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+ PHY_ID_MATCH_MODEL(PHY_ID_AQR112R),
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+ .name = "Aquantia AQR112R",
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+ .probe = aqr107_probe,
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+ .config_aneg = aqr_config_aneg_set_prot,
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+ .config_intr = aqr_config_intr,
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+ .handle_interrupt = aqr_handle_interrupt,
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+ .read_status = aqr107_read_status,
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+ .get_sset_count = aqr107_get_sset_count,
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+ .get_strings = aqr107_get_strings,
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+ .get_stats = aqr107_get_stats,
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+},
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};
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module_phy_driver(aqr_driver);
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@@ -1043,6 +1069,8 @@ static struct mdio_device_id __maybe_unu
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{ PHY_ID_MATCH_MODEL(PHY_ID_AQR113C) },
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{ PHY_ID_MATCH_MODEL(PHY_ID_AQR114C) },
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{ PHY_ID_MATCH_MODEL(PHY_ID_AQR813) },
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+ { PHY_ID_MATCH_MODEL(PHY_ID_AQR112C) },
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+ { PHY_ID_MATCH_MODEL(PHY_ID_AQR112R) },
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{ }
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};
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