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https://github.com/openwrt/openwrt.git
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8c405cdccc
The patches were generated from the RPi repo with the following command: git format-patch v6.6.34..rpi-6.1.y Some patches needed rebasing and, as usual, the applied and reverted, wireless drivers, Github workflows, READMEs and defconfigs patches were removed. Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
76 lines
2.9 KiB
Diff
76 lines
2.9 KiB
Diff
From 07dcd3d3dcf797cd40873d3914438171b08aee62 Mon Sep 17 00:00:00 2001
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From: Dom Cobley <popcornmix@gmail.com>
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Date: Thu, 25 May 2023 14:48:28 +0100
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Subject: [PATCH 0565/1085] dmaengine: bcm2835: Rename to_bcm2711_cbaddr to
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to_40bit_cbaddr
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As the shifted address also applies to bcm2712,
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give the function a more specific name.
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Signed-off-by: Dom Cobley <popcornmix@gmail.com>
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---
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drivers/dma/bcm2835-dma.c | 16 ++++++++--------
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1 file changed, 8 insertions(+), 8 deletions(-)
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--- a/drivers/dma/bcm2835-dma.c
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+++ b/drivers/dma/bcm2835-dma.c
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@@ -390,7 +390,7 @@ static inline uint32_t to_bcm2711_dsti(u
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BCM2711_DMA40_BURST_LEN(BCM2835_DMA_GET_BURST_LENGTH(info));
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}
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-static inline uint32_t to_bcm2711_cbaddr(dma_addr_t addr)
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+static inline uint32_t to_40bit_cbaddr(dma_addr_t addr)
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{
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BUG_ON(addr & 0x1f);
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return (addr >> 5);
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@@ -573,9 +573,9 @@ static struct bcm2835_desc *bcm2835_dma_
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if (frame && c->is_40bit_channel)
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((struct bcm2711_dma40_scb *)
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d->cb_list[frame - 1].cb)->next_cb =
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- to_bcm2711_cbaddr(cb_entry->paddr);
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+ to_40bit_cbaddr(cb_entry->paddr);
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if (frame && !c->is_40bit_channel)
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- d->cb_list[frame - 1].cb->next = to_bcm2711_cbaddr(cb_entry->paddr);
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+ d->cb_list[frame - 1].cb->next = to_40bit_cbaddr(cb_entry->paddr);
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/* update src and dst and length */
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if (src && (info & BCM2835_DMA_S_INC)) {
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@@ -755,14 +755,14 @@ static void bcm2835_dma_start_desc(struc
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c->desc = d = to_bcm2835_dma_desc(&vd->tx);
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if (c->is_40bit_channel) {
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- writel(to_bcm2711_cbaddr(d->cb_list[0].paddr),
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+ writel(to_40bit_cbaddr(d->cb_list[0].paddr),
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c->chan_base + BCM2711_DMA40_CB);
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writel(BCM2711_DMA40_ACTIVE | BCM2711_DMA40_PROT | BCM2711_DMA40_CS_FLAGS(c->dreq),
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c->chan_base + BCM2711_DMA40_CS);
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} else {
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writel(BIT(31), c->chan_base + BCM2835_DMA_CS);
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- writel(to_bcm2711_cbaddr(d->cb_list[0].paddr),
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+ writel(to_40bit_cbaddr(d->cb_list[0].paddr),
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c->chan_base + BCM2835_DMA_ADDR);
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writel(BCM2835_DMA_ACTIVE | BCM2835_DMA_CS_FLAGS(c->dreq),
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c->chan_base + BCM2835_DMA_CS);
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@@ -1130,9 +1130,9 @@ static struct dma_async_tx_descriptor *b
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if (c->is_40bit_channel)
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((struct bcm2711_dma40_scb *)
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d->cb_list[frames - 1].cb)->next_cb =
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- to_bcm2711_cbaddr(d->cb_list[0].paddr);
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+ to_40bit_cbaddr(d->cb_list[0].paddr);
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else
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- d->cb_list[d->frames - 1].cb->next = to_bcm2711_cbaddr(d->cb_list[0].paddr);
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+ d->cb_list[d->frames - 1].cb->next = to_40bit_cbaddr(d->cb_list[0].paddr);
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return vchan_tx_prep(&c->vc, &d->vd, flags);
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}
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@@ -1252,7 +1252,7 @@ void bcm2711_dma40_memcpy(dma_addr_t dst
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scb->len = size;
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scb->next_cb = 0;
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- writel(to_bcm2711_cbaddr(memcpy_scb_dma), memcpy_chan + BCM2711_DMA40_CB);
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+ writel(to_40bit_cbaddr(memcpy_scb_dma), memcpy_chan + BCM2711_DMA40_CB);
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writel(BCM2711_DMA40_MEMCPY_FLAGS | BCM2711_DMA40_ACTIVE | BCM2711_DMA40_PROT,
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memcpy_chan + BCM2711_DMA40_CS);
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