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e3559fb445
Changelog: https://cdn.kernel.org/pub/linux/kernel/v6.x/ChangeLog-6.1.54 Removed upstreamed: generic/backport-6.1/020-v6.3-02-UPSTREAM-mm-multi-gen-LRU-rename-lrugen-lists-to-lru.patch[1] ipq806x/patches-6.1/140-v6.5-hwspinlock-qcom-add-missing-regmap-config-for-SFPB-M.patch[2] All other patches automatically rebased. 1. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v6.1.54&id=a73d04c460521e45f257d28d73df096e41ece324 2. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v6.1.54&id=e93bc372dbc0bde133c854c03502a95617041972 Build system: x86/64 Build-tested: x86/64/AMD Cezanne Run-tested: x86/64/AMD Cezanne Signed-off-by: John Audia <therealgraysky@proton.me>
62 lines
1.5 KiB
Diff
62 lines
1.5 KiB
Diff
From 79b38b9f85da868ca59b66715c20aa55104b640b Mon Sep 17 00:00:00 2001
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From: Robert Marko <robert.marko@sartura.hr>
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Date: Fri, 2 Oct 2020 10:43:26 +0200
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Subject: [PATCH] arm: dts: ipq4019: QCA807x properties
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This adds necessary DT properties for QCA807x PHY-s to IPQ4019 DTSI.
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Signed-off-by: Robert Marko <robert.marko@sartura.hr>
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---
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arch/arm/boot/dts/qcom-ipq4019.dtsi | 17 +++++++++++++++++
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1 file changed, 17 insertions(+)
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--- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
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+++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
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@@ -8,6 +8,7 @@
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#include <dt-bindings/clock/qcom,gcc-ipq4019.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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+#include <dt-bindings/net/qcom-qca807x.h>
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/ {
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#address-cells = <1>;
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@@ -727,22 +728,38 @@
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ethphy0: ethernet-phy@0 {
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reg = <0>;
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+
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+ qcom,control-dac = <QCA807X_CONTROL_DAC_DSP_VOLT_QUARTER_BIAS>;
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};
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ethphy1: ethernet-phy@1 {
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reg = <1>;
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+
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+ qcom,control-dac = <QCA807X_CONTROL_DAC_DSP_VOLT_QUARTER_BIAS>;
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};
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ethphy2: ethernet-phy@2 {
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reg = <2>;
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+
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+ qcom,control-dac = <QCA807X_CONTROL_DAC_DSP_VOLT_QUARTER_BIAS>;
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};
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ethphy3: ethernet-phy@3 {
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reg = <3>;
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+
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+ qcom,control-dac = <QCA807X_CONTROL_DAC_DSP_VOLT_QUARTER_BIAS>;
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};
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ethphy4: ethernet-phy@4 {
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reg = <4>;
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+
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+ qcom,control-dac = <QCA807X_CONTROL_DAC_DSP_VOLT_QUARTER_BIAS>;
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+ };
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+
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+ psgmiiphy: psgmii-phy@5 {
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+ reg = <5>;
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+
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+ qcom,tx-driver-strength = <PSGMII_QSGMII_TX_DRIVER_300MV>;
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};
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};
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