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c6ddf8d502
Many changes were done in drivers/pinctrl/bcm/pinctrl-bcm2835.c between
5.4.171 and 5.4.179.
The following 3 patches do not apply any more:
* target/linux/bcm27xx/patches-5.4/950-0316-pinctrl-bcm2835-Add-support-for-BCM2711-pull-up-func.patch
This was already integrated in kernel v5.4-rc1, it was never needed.
* target/linux/bcm27xx/patches-5.4/950-0328-Revert-pinctrl-bcm2835-Pass-irqchip-when-adding-gpio.patch
* target/linux/bcm27xx/patches-5.4/950-0362-pinctrl-bcm2835-Change-init-order-for-gpio-hogs.patch
I think these were done to fix the problem which was really fixed in
commit 75278f1aff5e ("pinctrl: bcm2835: Change init order for gpio
hogs") from v5.4.175
target/linux/generic/backport-5.4/716-v5.5-net-sfp-move-fwnode-parsing-into-sfp-bus-layer.patch
Move fwnode_device_is_available to the same position as in kernel 5.10.
target/linux/layerscape/patches-5.4/302-dts-0083-arm64-ls1028a-qds-correct-bus-of-rtc.patch
Applied in commit 65816c1034769e714edb70f59a33bc5472d9e55f ("arm64: dts:
ls1028a-qds: move rtc node to the correct i2c bus")
Compile-tested: lantiq/xrx200, bcm27xx/bcm2710
Run-tested: lantiq/xrx200
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
894 lines
19 KiB
Diff
894 lines
19 KiB
Diff
From d2333a40b00ba5fb5b9731f96ca663036f781411 Mon Sep 17 00:00:00 2001
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From: Alex Marginean <alexandru.marginean@nxp.com>
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Date: Tue, 7 Jan 2020 14:48:20 +0200
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Subject: [PATCH] arm64: dts: fsl-ls1028a-qds: Add overlays for various serdes
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protocols
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Adds overlays for various serdes protocols on LS1028A QDS board using
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different PHY cards. These should be applied at boot, based on serdes
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configuration. If no overlay is applied, only the RGMII interface on
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the QDS is available in Linux.
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Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
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---
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arch/arm64/boot/dts/freescale/Makefile | 6 ++
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.../boot/dts/freescale/fsl-ls1028a-qds-13bb.dts | 100 +++++++++++++++++++++
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.../boot/dts/freescale/fsl-ls1028a-qds-1xxx.dtsi | 20 -----
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.../boot/dts/freescale/fsl-ls1028a-qds-65bb.dts | 94 +++++++++++++++++++
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.../boot/dts/freescale/fsl-ls1028a-qds-6xxx.dtsi | 20 -----
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.../boot/dts/freescale/fsl-ls1028a-qds-7777.dts | 73 +++++++++++++++
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.../boot/dts/freescale/fsl-ls1028a-qds-7777.dtsi | 56 ------------
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.../boot/dts/freescale/fsl-ls1028a-qds-85bb.dts | 93 +++++++++++++++++++
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.../boot/dts/freescale/fsl-ls1028a-qds-899b.dts | 66 ++++++++++++++
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.../boot/dts/freescale/fsl-ls1028a-qds-8xxx.dtsi | 19 ----
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.../boot/dts/freescale/fsl-ls1028a-qds-9999.dts | 71 +++++++++++++++
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.../boot/dts/freescale/fsl-ls1028a-qds-9999.dtsi | 57 ------------
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.../boot/dts/freescale/fsl-ls1028a-qds-x3xx.dtsi | 61 -------------
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.../boot/dts/freescale/fsl-ls1028a-qds-x5xx.dtsi | 57 ------------
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arch/arm64/boot/dts/freescale/fsl-ls1028a-qds.dts | 3 -
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15 files changed, 503 insertions(+), 293 deletions(-)
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create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1028a-qds-13bb.dts
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delete mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1028a-qds-1xxx.dtsi
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create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1028a-qds-65bb.dts
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delete mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1028a-qds-6xxx.dtsi
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create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1028a-qds-7777.dts
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delete mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1028a-qds-7777.dtsi
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create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1028a-qds-85bb.dts
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create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1028a-qds-899b.dts
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delete mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1028a-qds-8xxx.dtsi
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create mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1028a-qds-9999.dts
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delete mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1028a-qds-9999.dtsi
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delete mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1028a-qds-x3xx.dtsi
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delete mode 100644 arch/arm64/boot/dts/freescale/fsl-ls1028a-qds-x5xx.dtsi
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--- a/arch/arm64/boot/dts/freescale/Makefile
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+++ b/arch/arm64/boot/dts/freescale/Makefile
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@@ -6,6 +6,12 @@ dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1
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dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1012a-qds.dtb
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dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1012a-rdb.dtb
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dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1028a-qds.dtb
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+dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1028a-qds-13bb.dtb
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+dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1028a-qds-65bb.dtb
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+dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1028a-qds-7777.dtb
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+dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1028a-qds-85bb.dtb
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+dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1028a-qds-899b.dtb
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+dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1028a-qds-9999.dtb
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dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1028a-rdb.dtb
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dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1043a-qds.dtb
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dtb-$(CONFIG_ARCH_LAYERSCAPE) += fsl-ls1043a-qds-sdk.dtb
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--- /dev/null
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+++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a-qds-13bb.dts
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@@ -0,0 +1,100 @@
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+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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+/*
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+ * Device Tree fragment for LS1028A QDS board, serdes 13bb
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+ *
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+ * Copyright 2019 NXP
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+ *
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+ * Requires a LS1028A QDS board with lane B rework.
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+ * Requires a SCH-30841 card with lane A of connector rewired to PHY lane C.
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+ * Set-up is a SCH-30842 card in slot 1 and SCH-30841 in slot 2.
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+ */
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+
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+/dts-v1/;
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+/plugin/;
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+
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+/ {
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+ fragment@0 {
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+ target = <&mdio_slot1>;
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+ __overlay__ {
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+
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+ slot1_sgmii: ethernet-phy@2 {
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+ /* AQR112 */
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+ reg = <0x2>;
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+ compatible = "ethernet-phy-ieee802.3-c45";
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+ };
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+ };
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+ };
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+
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+ fragment@1 {
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+ target = <&enetc_port0>;
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+ __overlay__ {
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+ phy-handle = <&slot1_sgmii>;
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+ phy-mode = "usxgmii";
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+ };
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+ };
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+
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+ fragment@2 {
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+ target = <&mdio_slot2>;
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+ __overlay__ {
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+
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+ /* 4 ports on AQR412 */
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+ slot2_qxgmii0: ethernet-phy@0 {
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+ reg = <0x0>;
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+ compatible = "ethernet-phy-ieee802.3-c45";
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+ };
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+
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+ slot2_qxgmii1: ethernet-phy@1 {
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+ reg = <0x1>;
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+ compatible = "ethernet-phy-ieee802.3-c45";
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+ };
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+
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+ slot2_qxgmii2: ethernet-phy@2 {
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+ reg = <0x2>;
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+ compatible = "ethernet-phy-ieee802.3-c45";
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+ };
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+
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+ slot2_qxgmii3: ethernet-phy@3 {
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+ reg = <0x3>;
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+ compatible = "ethernet-phy-ieee802.3-c45";
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+ };
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+ };
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+ };
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+
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+ fragment@3 {
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+ target = <&mscc_felix_ports>;
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+ __overlay__ {
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+ port@0 {
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+ status = "okay";
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+ phy-handle = <&slot2_qxgmii0>;
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+ phy-mode = "usxgmii";
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+ managed = "in-band-status";
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+ };
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+
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+ port@1 {
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+ status = "okay";
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+ phy-handle = <&slot2_qxgmii1>;
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+ phy-mode = "usxgmii";
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+ managed = "in-band-status";
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+ };
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+
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+ port@2 {
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+ status = "okay";
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+ phy-handle = <&slot2_qxgmii2>;
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+ phy-mode = "usxgmii";
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+ managed = "in-band-status";
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+ };
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+
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+ port@3 {
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+ status = "okay";
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+ phy-handle = <&slot2_qxgmii3>;
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+ phy-mode = "usxgmii";
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+ managed = "in-band-status";
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+ };
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+ };
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+ };
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+};
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+
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--- a/arch/arm64/boot/dts/freescale/fsl-ls1028a-qds-1xxx.dtsi
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+++ /dev/null
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@@ -1,20 +0,0 @@
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-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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-/*
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- * Device Tree Include file for LS1028A QDS board, serdes 1xxx
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- *
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- * Copyright 2019 NXP
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- *
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- */
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-
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-&mdio_slot1 {
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- slot1_sgmii: ethernet-phy@2 {
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- /* AQR112 */
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- reg = <0x2>;
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- compatible = "ethernet-phy-ieee802.3-c45";
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- };
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-};
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-
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-&enetc_port0 {
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- phy-handle = <&slot1_sgmii>;
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- phy-connection-type = "usxgmii";
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-};
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--- /dev/null
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+++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a-qds-65bb.dts
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@@ -0,0 +1,94 @@
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+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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+/*
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+ * Device Tree fragment for LS1028A QDS board, serdes 69xx
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+ *
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+ * Copyright 2019 NXP
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+ *
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+ * Requires a LS1028A QDS board with lane B rework.
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+ * Requires a SCH-30842 card in slot 1 and a SCH-28021 card in slot 2.
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+ */
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+
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+/dts-v1/;
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+/plugin/;
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+
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+/ {
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+ fragment@0 {
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+ target = <&mdio_slot1>;
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+ __overlay__ {
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+
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+ slot1_sgmii: ethernet-phy@2 {
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+ /* AQR112 */
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+ reg = <0x2>;
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+ compatible = "ethernet-phy-ieee802.3-c45";
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+ };
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+ };
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+ };
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+
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+ fragment@1 {
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+ target = <&enetc_port0>;
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+ __overlay__ {
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+ phy-handle = <&slot1_sgmii>;
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+ phy-mode = "2500base-x";
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+ };
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+ };
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+
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+ fragment@2 {
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+ target = <&mdio_slot2>;
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+ __overlay__ {
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+
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+ /* 4 ports on VSC8514 */
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+ slot2_qsgmii0: ethernet-phy@8 {
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+ reg = <0x8>;
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+ };
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+
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+ slot2_qsgmii1: ethernet-phy@9 {
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+ reg = <0x9>;
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+ };
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+
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+ slot2_qsgmii2: ethernet-phy@a {
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+ reg = <0xa>;
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+ };
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+
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+ slot2_qsgmii3: ethernet-phy@b {
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+ reg = <0xb>;
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+ };
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+ };
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+ };
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+
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+ fragment@3 {
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+ target = <&mscc_felix_ports>;
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+ __overlay__ {
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+ port@0 {
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+ status = "okay";
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+ phy-handle = <&slot2_qsgmii0>;
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+ phy-mode = "qsgmii";
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+ managed = "in-band-status";
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+ };
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+
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+ port@1 {
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+ status = "okay";
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+ phy-handle = <&slot2_qsgmii1>;
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+ phy-mode = "qsgmii";
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+ managed = "in-band-status";
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+ };
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+
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+ port@2 {
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+ status = "okay";
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+ phy-handle = <&slot2_qsgmii2>;
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+ phy-mode = "qsgmii";
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+ managed = "in-band-status";
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+ };
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+
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+ port@3 {
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+ status = "okay";
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+ phy-handle = <&slot2_qsgmii3>;
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+ phy-mode = "qsgmii";
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+ managed = "in-band-status";
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+ };
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+ };
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+ };
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+};
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--- a/arch/arm64/boot/dts/freescale/fsl-ls1028a-qds-6xxx.dtsi
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+++ /dev/null
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@@ -1,20 +0,0 @@
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-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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-/*
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- * Device Tree Include file for LS1028A QDS board, serdes 6xxx
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- *
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- * Copyright 2019 NXP
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- *
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- */
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-
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-&mdio_slot1 {
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- slot1_sgmii: ethernet-phy@2 {
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- /* AQR112 */
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- reg = <0x2>;
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- compatible = "ethernet-phy-ieee802.3-c45";
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- };
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-};
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-
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-&enetc_port0 {
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- phy-handle = <&slot1_sgmii>;
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- phy-connection-type = "2500base-x";
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-};
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--- /dev/null
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+++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a-qds-7777.dts
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@@ -0,0 +1,73 @@
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+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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+/*
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+ * Device Tree fragment for LS1028A QDS board, serdes 7777
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+ *
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+ * Copyright 2019 NXP
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+ *
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+ * Requires a LS1028A QDS board without lane B rework.
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+ * Requires a SCH-30841 card without lane A/C rewire and with a FW with muxing
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+ * disabled, plugged in slot 1.
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+ */
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+
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+/dts-v1/;
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+/plugin/;
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+
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+/ {
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+ fragment@0 {
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+ target = <&mdio_slot1>;
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+ __overlay__ {
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+
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+ /* 4 ports on AQR412 */
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+ slot1_sxgmii0: ethernet-phy@0 {
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+ reg = <0x0>;
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+ compatible = "ethernet-phy-ieee802.3-c45";
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+ };
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+
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+ slot1_sxgmii1: ethernet-phy@1 {
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+ reg = <0x1>;
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+ compatible = "ethernet-phy-ieee802.3-c45";
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+ };
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+
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+ slot1_sxgmii2: ethernet-phy@2 {
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+ reg = <0x2>;
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+ compatible = "ethernet-phy-ieee802.3-c45";
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+ };
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+
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+ slot1_sxgmii3: ethernet-phy@3 {
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+ reg = <0x3>;
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+ compatible = "ethernet-phy-ieee802.3-c45";
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+ };
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+ };
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+ };
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+
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+ fragment@1 {
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+ target = <&mscc_felix_ports>;
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+ __overlay__ {
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+ port@0 {
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+ status = "okay";
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+ phy-handle = <&slot1_sxgmii0>;
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+ phy-mode = "2500base-x";
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+ };
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+
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+ port@1 {
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+ status = "okay";
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+ phy-handle = <&slot1_sxgmii1>;
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+ phy-mode = "2500base-x";
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+ };
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+
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+ port@2 {
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+ status = "okay";
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+ phy-handle = <&slot1_sxgmii2>;
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+ phy-mode = "2500base-x";
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+ };
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+
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+ port@3 {
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+ status = "okay";
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+ phy-handle = <&slot1_sxgmii3>;
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+ phy-mode = "2500base-x";
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+ };
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+ };
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+ };
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+};
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--- a/arch/arm64/boot/dts/freescale/fsl-ls1028a-qds-7777.dtsi
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+++ /dev/null
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@@ -1,56 +0,0 @@
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-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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-/*
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- * Device Tree Include file for LS1028A QDS board, serdes 9999
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- *
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- * Copyright 2019 NXP
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- *
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- */
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-
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-&mdio_slot1 {
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- slot1_sxgmii0: ethernet-phy@0 {
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- reg = <0x0>;
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- compatible = "ethernet-phy-ieee802.3-c45";
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- };
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-
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- slot1_sxgmii1: ethernet-phy@1 {
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- reg = <0x1>;
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- compatible = "ethernet-phy-ieee802.3-c45";
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- };
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-
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- slot1_sxgmii2: ethernet-phy@2 {
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- reg = <0x2>;
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- compatible = "ethernet-phy-ieee802.3-c45";
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- };
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-
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- slot1_sxgmii3: ethernet-phy@3 {
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- reg = <0x3>;
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- compatible = "ethernet-phy-ieee802.3-c45";
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- };
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|
-};
|
|
-
|
|
-/* l2switch ports */
|
|
-&mscc_felix_ports {
|
|
- port@0 {
|
|
- status = "okay";
|
|
- phy-handle = <&slot1_sxgmii0>;
|
|
- phy-mode = "2500base-x";
|
|
- };
|
|
-
|
|
- port@1 {
|
|
- status = "okay";
|
|
- phy-handle = <&slot1_sxgmii1>;
|
|
- phy-mode = "2500base-x";
|
|
- };
|
|
-
|
|
- port@2 {
|
|
- status = "okay";
|
|
- phy-handle = <&slot1_sxgmii2>;
|
|
- phy-mode = "2500base-x";
|
|
- };
|
|
-
|
|
- port@3 {
|
|
- status = "okay";
|
|
- phy-handle = <&slot1_sxgmii3>;
|
|
- phy-mode = "2500base-x";
|
|
- };
|
|
-};
|
|
--- /dev/null
|
|
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a-qds-85bb.dts
|
|
@@ -0,0 +1,93 @@
|
|
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
|
+/*
|
|
+ * Device Tree fragment for LS1028A QDS board, serdes 85bb
|
|
+ *
|
|
+ * Copyright 2019 NXP
|
|
+ *
|
|
+ * Requires a LS1028A QDS board with lane B rework.
|
|
+ * Requires a SCH-24801 card in slot 1 and a SCH-28021 card in slot 2.
|
|
+ */
|
|
+
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/ {
|
|
+ fragment@0 {
|
|
+ target = <&mdio_slot1>;
|
|
+ __overlay__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ slot1_sgmii: ethernet-phy@1c {
|
|
+ /* 1st port on VSC8234 */
|
|
+ reg = <0x1c>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&enetc_port0>;
|
|
+ __overlay__ {
|
|
+ phy-handle = <&slot1_sgmii>;
|
|
+ phy-mode = "sgmii";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target = <&mdio_slot2>;
|
|
+ __overlay__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ /* 4 ports on VSC8514 */
|
|
+ slot2_qsgmii0: ethernet-phy@8 {
|
|
+ reg = <0x8>;
|
|
+ };
|
|
+
|
|
+ slot2_qsgmii1: ethernet-phy@9 {
|
|
+ reg = <0x9>;
|
|
+ };
|
|
+
|
|
+ slot2_qsgmii2: ethernet-phy@a {
|
|
+ reg = <0xa>;
|
|
+ };
|
|
+
|
|
+ slot2_qsgmii3: ethernet-phy@b {
|
|
+ reg = <0xb>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@3 {
|
|
+ target = <&mscc_felix_ports>;
|
|
+ __overlay__ {
|
|
+ port@0 {
|
|
+ status = "okay";
|
|
+ phy-handle = <&slot2_qsgmii0>;
|
|
+ phy-mode = "qsgmii";
|
|
+ managed = "in-band-status";
|
|
+ };
|
|
+
|
|
+ port@1 {
|
|
+ status = "okay";
|
|
+ phy-handle = <&slot2_qsgmii1>;
|
|
+ phy-mode = "qsgmii";
|
|
+ managed = "in-band-status";
|
|
+ };
|
|
+
|
|
+ port@2 {
|
|
+ status = "okay";
|
|
+ phy-handle = <&slot2_qsgmii2>;
|
|
+ phy-mode = "qsgmii";
|
|
+ managed = "in-band-status";
|
|
+ };
|
|
+
|
|
+ port@3 {
|
|
+ status = "okay";
|
|
+ phy-handle = <&slot2_qsgmii3>;
|
|
+ phy-mode = "qsgmii";
|
|
+ managed = "in-band-status";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+};
|
|
--- /dev/null
|
|
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a-qds-899b.dts
|
|
@@ -0,0 +1,66 @@
|
|
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
|
+/*
|
|
+ * Device Tree fragment for LS1028A QDS board, serdes 85xx
|
|
+ *
|
|
+ * Copyright 2019 NXP
|
|
+ *
|
|
+ * Requires a LS1028A QDS board without lane B rework.
|
|
+ * Requires a SCH-24801 card in slot 1.
|
|
+ */
|
|
+
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/ {
|
|
+ fragment@0 {
|
|
+ target = <&mdio_slot1>;
|
|
+ __overlay__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ /* VSC8234 */
|
|
+ slot1_sgmii0: ethernet-phy@1c {
|
|
+ reg = <0x1c>;
|
|
+ };
|
|
+
|
|
+ slot1_sgmii1: ethernet-phy@1d {
|
|
+ reg = <0x1d>;
|
|
+ };
|
|
+
|
|
+ slot1_sgmii2: ethernet-phy@1e {
|
|
+ reg = <0x1e>;
|
|
+ };
|
|
+
|
|
+ slot1_sgmii3: ethernet-phy@1f {
|
|
+ reg = <0x1f>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@1 {
|
|
+ target = <&enetc_port0>;
|
|
+ __overlay__ {
|
|
+ phy-handle = <&slot1_sgmii0>;
|
|
+ phy-mode = "sgmii";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ fragment@2 {
|
|
+ target = <&mscc_felix_ports>;
|
|
+ __overlay__ {
|
|
+ port@1 {
|
|
+ status = "okay";
|
|
+ phy-handle = <&slot1_sgmii1>;
|
|
+ phy-mode = "sgmii";
|
|
+ managed = "in-band-status";
|
|
+ };
|
|
+
|
|
+ port@2 {
|
|
+ status = "okay";
|
|
+ phy-handle = <&slot1_sgmii2>;
|
|
+ phy-mode = "sgmii";
|
|
+ managed = "in-band-status";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+};
|
|
--- a/arch/arm64/boot/dts/freescale/fsl-ls1028a-qds-8xxx.dtsi
|
|
+++ /dev/null
|
|
@@ -1,19 +0,0 @@
|
|
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
|
-/*
|
|
- * Device Tree Include file for LS1028A QDS board, serdes 8xxx
|
|
- *
|
|
- * Copyright 2019 NXP
|
|
- *
|
|
- */
|
|
-
|
|
-&mdio_slot1 {
|
|
- slot1_sgmii: ethernet-phy@1c {
|
|
- /* 1st port on VSC8234 */
|
|
- reg = <0x1c>;
|
|
- };
|
|
-};
|
|
-
|
|
-&enetc_port0 {
|
|
- phy-handle = <&slot1_sgmii>;
|
|
- phy-connection-type = "sgmii";
|
|
-};
|
|
--- /dev/null
|
|
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a-qds-9999.dts
|
|
@@ -0,0 +1,71 @@
|
|
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
|
+/*
|
|
+ * Device Tree fragment for LS1028A QDS board, serdes 85xx
|
|
+ *
|
|
+ * Copyright 2019 NXP
|
|
+ *
|
|
+ * Requires a LS1028A QDS board without lane B rework.
|
|
+ * Requires a SCH-24801 card in slot 1.
|
|
+ */
|
|
+
|
|
+/dts-v1/;
|
|
+/plugin/;
|
|
+
|
|
+/ {
|
|
+ fragment@0 {
|
|
+ target = <&mdio_slot1>;
|
|
+ __overlay__ {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ /* VSC8234 */
|
|
+ slot1_sgmii0: ethernet-phy@1c {
|
|
+ reg = <0x1c>;
|
|
+ };
|
|
+
|
|
+ slot1_sgmii1: ethernet-phy@1d {
|
|
+ reg = <0x1d>;
|
|
+ };
|
|
+
|
|
+ slot1_sgmii2: ethernet-phy@1e {
|
|
+ reg = <0x1e>;
|
|
+ };
|
|
+
|
|
+ slot1_sgmii3: ethernet-phy@1f {
|
|
+ reg = <0x1f>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+ fragment@1 {
|
|
+ target = <&mscc_felix_ports>;
|
|
+ __overlay__ {
|
|
+ port@0 {
|
|
+ status = "okay";
|
|
+ phy-handle = <&slot1_sgmii0>;
|
|
+ phy-mode = "sgmii";
|
|
+ managed = "in-band-status";
|
|
+ };
|
|
+
|
|
+ port@1 {
|
|
+ status = "okay";
|
|
+ phy-handle = <&slot1_sgmii1>;
|
|
+ phy-mode = "sgmii";
|
|
+ managed = "in-band-status";
|
|
+ };
|
|
+
|
|
+ port@2 {
|
|
+ status = "okay";
|
|
+ phy-handle = <&slot1_sgmii2>;
|
|
+ phy-mode = "sgmii";
|
|
+ managed = "in-band-status";
|
|
+ };
|
|
+
|
|
+ port@3 {
|
|
+ status = "okay";
|
|
+ phy-handle = <&slot1_sgmii3>;
|
|
+ phy-mode = "sgmii";
|
|
+ managed = "in-band-status";
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+};
|
|
--- a/arch/arm64/boot/dts/freescale/fsl-ls1028a-qds-9999.dtsi
|
|
+++ /dev/null
|
|
@@ -1,57 +0,0 @@
|
|
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
|
-/*
|
|
- * Device Tree Include file for LS1028A QDS board, serdes 9999
|
|
- *
|
|
- * Copyright 2019 NXP
|
|
- *
|
|
- */
|
|
-
|
|
-&mdio_slot1 {
|
|
- /* VSC8234 */
|
|
- slot1_sgmii0: ethernet-phy@1c {
|
|
- reg = <0x1c>;
|
|
- };
|
|
-
|
|
- slot1_sgmii1: ethernet-phy@1d {
|
|
- reg = <0x1d>;
|
|
- };
|
|
-
|
|
- slot1_sgmii2: ethernet-phy@1e {
|
|
- reg = <0x1e>;
|
|
- };
|
|
-
|
|
- slot1_sgmii3: ethernet-phy@1f {
|
|
- reg = <0x1f>;
|
|
- };
|
|
-};
|
|
-
|
|
-/* l2switch ports */
|
|
-&mscc_felix_ports {
|
|
- port@0 {
|
|
- status = "okay";
|
|
- phy-handle = <&slot1_sgmii0>;
|
|
- phy-mode = "sgmii";
|
|
- managed = "in-band-status";
|
|
- };
|
|
-
|
|
- port@1 {
|
|
- status = "okay";
|
|
- phy-handle = <&slot1_sgmii1>;
|
|
- phy-mode = "sgmii";
|
|
- managed = "in-band-status";
|
|
- };
|
|
-
|
|
- port@2 {
|
|
- status = "okay";
|
|
- phy-handle = <&slot1_sgmii2>;
|
|
- phy-mode = "sgmii";
|
|
- managed = "in-band-status";
|
|
- };
|
|
-
|
|
- port@3 {
|
|
- status = "okay";
|
|
- phy-handle = <&slot1_sgmii3>;
|
|
- phy-mode = "sgmii";
|
|
- managed = "in-band-status";
|
|
- };
|
|
-};
|
|
--- a/arch/arm64/boot/dts/freescale/fsl-ls1028a-qds-x3xx.dtsi
|
|
+++ /dev/null
|
|
@@ -1,61 +0,0 @@
|
|
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
|
-/*
|
|
- * Device Tree Include file for LS1028A QDS board, serdes x3xx
|
|
- *
|
|
- * Copyright 2019 NXP
|
|
- *
|
|
- */
|
|
-
|
|
-&mdio_slot2 {
|
|
- /* 4 ports on AQR412 */
|
|
- slot2_qxgmii0: ethernet-phy@0 {
|
|
- reg = <0x0>;
|
|
- compatible = "ethernet-phy-ieee802.3-c45";
|
|
- };
|
|
-
|
|
- slot2_qxgmii1: ethernet-phy@1 {
|
|
- reg = <0x1>;
|
|
- compatible = "ethernet-phy-ieee802.3-c45";
|
|
- };
|
|
-
|
|
- slot2_qxgmii2: ethernet-phy@2 {
|
|
- reg = <0x2>;
|
|
- compatible = "ethernet-phy-ieee802.3-c45";
|
|
- };
|
|
-
|
|
- slot2_qxgmii3: ethernet-phy@3 {
|
|
- reg = <0x3>;
|
|
- compatible = "ethernet-phy-ieee802.3-c45";
|
|
- };
|
|
-};
|
|
-
|
|
-/* l2switch ports */
|
|
-&mscc_felix_ports {
|
|
- port@0 {
|
|
- status = "okay";
|
|
- phy-handle = <&slot2_qxgmii0>;
|
|
- phy-mode = "usxgmii";
|
|
- managed = "in-band-status";
|
|
- };
|
|
-
|
|
- port@1 {
|
|
- status = "okay";
|
|
- phy-handle = <&slot2_qxgmii1>;
|
|
- phy-mode = "usxgmii";
|
|
- managed = "in-band-status";
|
|
- };
|
|
-
|
|
- port@2 {
|
|
- status = "okay";
|
|
- phy-handle = <&slot2_qxgmii2>;
|
|
- phy-mode = "usxgmii";
|
|
- managed = "in-band-status";
|
|
- };
|
|
-
|
|
- port@3 {
|
|
- status = "okay";
|
|
- phy-handle = <&slot2_qxgmii3>;
|
|
- phy-mode = "usxgmii";
|
|
- managed = "in-band-status";
|
|
- };
|
|
-};
|
|
--- a/arch/arm64/boot/dts/freescale/fsl-ls1028a-qds-x5xx.dtsi
|
|
+++ /dev/null
|
|
@@ -1,57 +0,0 @@
|
|
-// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
|
-/*
|
|
- * Device Tree Include file for LS1028A QDS board, serdes x5xx
|
|
- *
|
|
- * Copyright 2019 NXP
|
|
- *
|
|
- */
|
|
-
|
|
-&mdio_slot2 {
|
|
- /* 4 ports on VSC8514 */
|
|
- slot2_qsgmii0: ethernet-phy@8 {
|
|
- reg = <0x8>;
|
|
- };
|
|
-
|
|
- slot2_qsgmii1: ethernet-phy@9 {
|
|
- reg = <0x9>;
|
|
- };
|
|
-
|
|
- slot2_qsgmii2: ethernet-phy@a {
|
|
- reg = <0xa>;
|
|
- };
|
|
-
|
|
- slot2_qsgmii3: ethernet-phy@b {
|
|
- reg = <0xb>;
|
|
- };
|
|
-};
|
|
-
|
|
-/* l2switch ports */
|
|
-&mscc_felix_ports {
|
|
- port@0 {
|
|
- status = "okay";
|
|
- phy-handle = <&slot2_qsgmii0>;
|
|
- phy-mode = "qsgmii";
|
|
- managed = "in-band-status";
|
|
- };
|
|
-
|
|
- port@1 {
|
|
- status = "okay";
|
|
- phy-handle = <&slot2_qsgmii1>;
|
|
- phy-mode = "qsgmii";
|
|
- managed = "in-band-status";
|
|
- };
|
|
-
|
|
- port@2 {
|
|
- status = "okay";
|
|
- phy-handle = <&slot2_qsgmii2>;
|
|
- phy-mode = "qsgmii";
|
|
- managed = "in-band-status";
|
|
- };
|
|
-
|
|
- port@3 {
|
|
- status = "okay";
|
|
- phy-handle = <&slot2_qsgmii3>;
|
|
- phy-mode = "qsgmii";
|
|
- managed = "in-band-status";
|
|
- };
|
|
-};
|
|
--- a/arch/arm64/boot/dts/freescale/fsl-ls1028a-qds.dts
|
|
+++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a-qds.dts
|
|
@@ -277,6 +277,3 @@
|
|
lane-mapping = <0x4e>;
|
|
status = "okay";
|
|
};
|
|
-
|
|
-#include "fsl-ls1028a-qds-8xxx.dtsi"
|
|
-#include "fsl-ls1028a-qds-x5xx.dtsi"
|