mirror of
https://github.com/openwrt/openwrt.git
synced 2024-12-23 23:42:43 +00:00
99545b4bb1
This target adds support for the Allwinner D1 RISC-V based SoCs.
- RISC-V single-core T-Head C906 (RV64GCV)
- Tensilica HiFi4 DSP
- DDR2/DDR3 support
- 10/100/1000M ethernet
- usual peripherals like USB2, SPI, I2C, PWM, etc.
Four boards are supported:
- Dongshan Nezha STU
- 512Mb RAM
- ethernet
- LicheePi RV Dock
- 512Mb RAM
- wireless-only (RTL8723DS)
- MangoPi MQ-Pro
- 512Mb RAM
- there are pads available for an SPI flash
- wireless-only (RTL8723DS)
- Nezha D1
- 512Mb/1Gb/2Gb RAM
- 256Mb NAND flash
- ethernet, wireless
Installation:
Standard SD-card installation via dd-ing the generated image to
an SD-card of at least 256Mb.
Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu>
39 lines
1.1 KiB
Diff
39 lines
1.1 KiB
Diff
From 20a204b31291befcd583f97dafc0a827f3bc7f00 Mon Sep 17 00:00:00 2001
|
|
From: Samuel Holland <samuel@sholland.org>
|
|
Date: Fri, 12 Aug 2022 01:37:16 -0500
|
|
Subject: [PATCH 099/117] dt-bindings: sun6i-a31-mipi-dphy: Add the interrupts
|
|
property
|
|
|
|
The sun6i DPHY can generate several interrupts, mostly for reporting
|
|
error conditions, but also for detecting BTA and UPLS sequences.
|
|
Document this capability in order to accurately describe the hardware.
|
|
|
|
The DPHY has no interrupt number provided in the vendor documentation
|
|
because its interrupt line is shared with the DSI controller.
|
|
|
|
Signed-off-by: Samuel Holland <samuel@sholland.org>
|
|
---
|
|
.../bindings/phy/allwinner,sun6i-a31-mipi-dphy.yaml | 4 ++++
|
|
1 file changed, 4 insertions(+)
|
|
|
|
--- a/Documentation/devicetree/bindings/phy/allwinner,sun6i-a31-mipi-dphy.yaml
|
|
+++ b/Documentation/devicetree/bindings/phy/allwinner,sun6i-a31-mipi-dphy.yaml
|
|
@@ -24,6 +24,9 @@ properties:
|
|
reg:
|
|
maxItems: 1
|
|
|
|
+ interrupts:
|
|
+ maxItems: 1
|
|
+
|
|
clocks:
|
|
items:
|
|
- description: Bus Clock
|
|
@@ -53,6 +56,7 @@ required:
|
|
- "#phy-cells"
|
|
- compatible
|
|
- reg
|
|
+ - interrupts
|
|
- clocks
|
|
- clock-names
|
|
- resets
|