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99545b4bb1
This target adds support for the Allwinner D1 RISC-V based SoCs.
- RISC-V single-core T-Head C906 (RV64GCV)
- Tensilica HiFi4 DSP
- DDR2/DDR3 support
- 10/100/1000M ethernet
- usual peripherals like USB2, SPI, I2C, PWM, etc.
Four boards are supported:
- Dongshan Nezha STU
- 512Mb RAM
- ethernet
- LicheePi RV Dock
- 512Mb RAM
- wireless-only (RTL8723DS)
- MangoPi MQ-Pro
- 512Mb RAM
- there are pads available for an SPI flash
- wireless-only (RTL8723DS)
- Nezha D1
- 512Mb/1Gb/2Gb RAM
- 256Mb NAND flash
- ethernet, wireless
Installation:
Standard SD-card installation via dd-ing the generated image to
an SD-card of at least 256Mb.
Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu>
80 lines
1.9 KiB
Diff
80 lines
1.9 KiB
Diff
From c225b48d2cf5f5a824b5b0a4144511bdc5f65ab5 Mon Sep 17 00:00:00 2001
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From: Samuel Holland <samuel@sholland.org>
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Date: Sun, 14 Aug 2022 11:18:11 -0500
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Subject: [PATCH 080/117] riscv: dts: allwinner: d1: Add thermal sensor and
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zone
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Signed-off-by: Samuel Holland <samuel@sholland.org>
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---
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.../sun20i-d1-common-regulators.dtsi | 4 ++
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arch/riscv/boot/dts/allwinner/sun20i-d1.dtsi | 41 +++++++++++++++++++
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2 files changed, 45 insertions(+)
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--- a/arch/riscv/boot/dts/allwinner/sun20i-d1-common-regulators.dtsi
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+++ b/arch/riscv/boot/dts/allwinner/sun20i-d1-common-regulators.dtsi
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@@ -49,3 +49,7 @@
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regulator-max-microvolt = <1800000>;
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ldo-in-supply = <®_vcc_3v3>;
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};
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+
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+&ths {
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+ vref-supply = <®_aldo>;
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+};
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--- a/arch/riscv/boot/dts/allwinner/sun20i-d1.dtsi
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+++ b/arch/riscv/boot/dts/allwinner/sun20i-d1.dtsi
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@@ -59,6 +59,35 @@
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#clock-cells = <0>;
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};
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+ thermal-zones {
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+ cpu-thermal {
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+ polling-delay = <0>;
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+ polling-delay-passive = <0>;
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+ thermal-sensors = <&ths>;
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+
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+ trips {
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+ cpu_target: cpu-target {
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+ hysteresis = <3000>;
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+ temperature = <85000>;
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+ type = "passive";
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+ };
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+
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+ cpu-crit {
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+ hysteresis = <0>;
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+ temperature = <110000>;
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+ type = "critical";
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+ };
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+ };
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+
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+ cooling-maps {
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+ map0 {
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+ trip = <&cpu_target>;
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+ cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
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+ };
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+ };
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+ };
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+ };
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+
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soc {
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compatible = "simple-bus";
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ranges;
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@@ -252,6 +281,18 @@
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#size-cells = <0>;
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};
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+ ths: temperature-sensor@2009400 {
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+ compatible = "allwinner,sun20i-d1-ths";
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+ reg = <0x2009400 0x400>;
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+ interrupts = <74 IRQ_TYPE_LEVEL_HIGH>;
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+ clocks = <&ccu CLK_BUS_THS>, <&osc24M>;
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+ clock-names = "bus", "mod";
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+ resets = <&ccu RST_BUS_THS>;
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+ nvmem-cells = <&ths_calib>;
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+ nvmem-cell-names = "calibration";
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+ #thermal-sensor-cells = <0>;
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+ };
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+
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lradc: keys@2009800 {
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compatible = "allwinner,sun20i-d1-lradc",
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"allwinner,sun50i-r329-lradc";
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