mirror of
https://github.com/openwrt/openwrt.git
synced 2024-12-19 21:58:04 +00:00
99545b4bb1
This target adds support for the Allwinner D1 RISC-V based SoCs. - RISC-V single-core T-Head C906 (RV64GCV) - Tensilica HiFi4 DSP - DDR2/DDR3 support - 10/100/1000M ethernet - usual peripherals like USB2, SPI, I2C, PWM, etc. Four boards are supported: - Dongshan Nezha STU - 512Mb RAM - ethernet - LicheePi RV Dock - 512Mb RAM - wireless-only (RTL8723DS) - MangoPi MQ-Pro - 512Mb RAM - there are pads available for an SPI flash - wireless-only (RTL8723DS) - Nezha D1 - 512Mb/1Gb/2Gb RAM - 256Mb NAND flash - ethernet, wireless Installation: Standard SD-card installation via dd-ing the generated image to an SD-card of at least 256Mb. Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu>
62 lines
1.5 KiB
Diff
62 lines
1.5 KiB
Diff
From 2ee8994e4db3978261e6c644e897400c4df5edeb Mon Sep 17 00:00:00 2001
|
|
From: Samuel Holland <samuel@sholland.org>
|
|
Date: Thu, 11 Aug 2022 22:24:52 -0500
|
|
Subject: [PATCH 063/117] riscv: dts: allwinner: d1: Add PWM support
|
|
|
|
Signed-off-by: Samuel Holland <samuel@sholland.org>
|
|
---
|
|
arch/riscv/boot/dts/allwinner/sun20i-d1.dtsi | 35 ++++++++++++++++++++
|
|
1 file changed, 35 insertions(+)
|
|
|
|
--- a/arch/riscv/boot/dts/allwinner/sun20i-d1.dtsi
|
|
+++ b/arch/riscv/boot/dts/allwinner/sun20i-d1.dtsi
|
|
@@ -155,6 +155,30 @@
|
|
};
|
|
|
|
/omit-if-no-ref/
|
|
+ pwm0_pd16_pin: pwm0-pd16-pin {
|
|
+ pins = "PD16";
|
|
+ function = "pwm0";
|
|
+ };
|
|
+
|
|
+ /omit-if-no-ref/
|
|
+ pwm2_pd18_pin: pwm2-pd18-pin {
|
|
+ pins = "PD18";
|
|
+ function = "pwm2";
|
|
+ };
|
|
+
|
|
+ /omit-if-no-ref/
|
|
+ pwm4_pd20_pin: pwm4-pd20-pin {
|
|
+ pins = "PD20";
|
|
+ function = "pwm4";
|
|
+ };
|
|
+
|
|
+ /omit-if-no-ref/
|
|
+ pwm7_pd22_pin: pwm7-pd22-pin {
|
|
+ pins = "PD22";
|
|
+ function = "pwm7";
|
|
+ };
|
|
+
|
|
+ /omit-if-no-ref/
|
|
uart0_pb8_pins: uart0-pb8-pins {
|
|
pins = "PB8", "PB9";
|
|
function = "uart0";
|
|
@@ -173,6 +197,17 @@
|
|
};
|
|
};
|
|
|
|
+ pwm: pwm@2000c00 {
|
|
+ compatible = "allwinner,sun20i-d1-pwm";
|
|
+ reg = <0x2000c00 0x400>;
|
|
+ interrupts = <34 IRQ_TYPE_LEVEL_HIGH>;
|
|
+ clocks = <&ccu CLK_BUS_PWM>, <&osc24M>;
|
|
+ clock-names = "bus", "mod";
|
|
+ resets = <&ccu RST_BUS_PWM>;
|
|
+ status = "disabled";
|
|
+ #pwm-cells = <3>;
|
|
+ };
|
|
+
|
|
ccu: clock-controller@2001000 {
|
|
compatible = "allwinner,sun20i-d1-ccu";
|
|
reg = <0x2001000 0x1000>;
|