mirror of
https://github.com/openwrt/openwrt.git
synced 2024-12-19 21:58:04 +00:00
99545b4bb1
This target adds support for the Allwinner D1 RISC-V based SoCs.
- RISC-V single-core T-Head C906 (RV64GCV)
- Tensilica HiFi4 DSP
- DDR2/DDR3 support
- 10/100/1000M ethernet
- usual peripherals like USB2, SPI, I2C, PWM, etc.
Four boards are supported:
- Dongshan Nezha STU
- 512Mb RAM
- ethernet
- LicheePi RV Dock
- 512Mb RAM
- wireless-only (RTL8723DS)
- MangoPi MQ-Pro
- 512Mb RAM
- there are pads available for an SPI flash
- wireless-only (RTL8723DS)
- Nezha D1
- 512Mb/1Gb/2Gb RAM
- 256Mb NAND flash
- ethernet, wireless
Installation:
Standard SD-card installation via dd-ing the generated image to
an SD-card of at least 256Mb.
Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu>
31 lines
1.2 KiB
Diff
31 lines
1.2 KiB
Diff
From d03341ef7acb64803ade6b173d24f49ffa6149a3 Mon Sep 17 00:00:00 2001
|
|
From: Samuel Holland <samuel@sholland.org>
|
|
Date: Tue, 2 Aug 2022 00:29:32 -0500
|
|
Subject: [PATCH 019/117] dt-bindings: nvmem: Allow bit offsets greater than a
|
|
byte
|
|
|
|
Some NVMEM devices contain cells which do not start at a multiple of the
|
|
device's stride. However, the "reg" property of a cell must be aligned
|
|
to its provider device's stride.
|
|
|
|
These cells can be represented in the DT using the "bits" property if
|
|
that property allows offsets up to the full stride. 63 is chosen
|
|
assuming that NVMEM devices will not have strides larger than 8 bytes.
|
|
|
|
Signed-off-by: Samuel Holland <samuel@sholland.org>
|
|
---
|
|
Documentation/devicetree/bindings/nvmem/nvmem.yaml | 2 +-
|
|
1 file changed, 1 insertion(+), 1 deletion(-)
|
|
|
|
--- a/Documentation/devicetree/bindings/nvmem/nvmem.yaml
|
|
+++ b/Documentation/devicetree/bindings/nvmem/nvmem.yaml
|
|
@@ -53,7 +53,7 @@ patternProperties:
|
|
$ref: /schemas/types.yaml#/definitions/uint32-array
|
|
items:
|
|
- minimum: 0
|
|
- maximum: 7
|
|
+ maximum: 63
|
|
description:
|
|
Offset in bit within the address range specified by reg.
|
|
- minimum: 1
|