mirror of
https://github.com/openwrt/openwrt.git
synced 2024-12-29 10:08:59 +00:00
659f4a13dd
With Linux 6.1 many of our downstream patches and out-of-tree files can be removed or at least replaced by backported upstream commits. Signed-off-by: Daniel Golle <daniel@makrotopia.org> [fix CMDLINE_OVERRIDE for arm64] Signed-off-by: Bjørn Mork <bjorn@mork.no>
75 lines
2.4 KiB
Diff
75 lines
2.4 KiB
Diff
From b8eb1081d267708ba976525a1fe2162901b34f3a Mon Sep 17 00:00:00 2001
|
|
From: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
|
|
Date: Fri, 20 Jan 2023 10:20:37 +0100
|
|
Subject: [PATCH] clk: mediatek: clk-mtk: Add dummy clock ops
|
|
|
|
In order to migrate some (few) old clock drivers to the common
|
|
mtk_clk_simple_probe() function, add dummy clock ops to be able
|
|
to insert a dummy clock with ID 0 at the beginning of the list.
|
|
|
|
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
|
|
Reviewed-by: Miles Chen <miles.chen@mediatek.com>
|
|
Reviewed-by: Chen-Yu Tsai <wenst@chromium.org>
|
|
Tested-by: Miles Chen <miles.chen@mediatek.com>
|
|
Link: https://lore.kernel.org/r/20230120092053.182923-8-angelogioacchino.delregno@collabora.com
|
|
Tested-by: Mingming Su <mingming.su@mediatek.com>
|
|
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
|
|
---
|
|
drivers/clk/mediatek/clk-mtk.c | 16 ++++++++++++++++
|
|
drivers/clk/mediatek/clk-mtk.h | 19 +++++++++++++++++++
|
|
2 files changed, 35 insertions(+)
|
|
|
|
--- a/drivers/clk/mediatek/clk-mtk.c
|
|
+++ b/drivers/clk/mediatek/clk-mtk.c
|
|
@@ -18,6 +18,22 @@
|
|
#include "clk-mtk.h"
|
|
#include "clk-gate.h"
|
|
|
|
+const struct mtk_gate_regs cg_regs_dummy = { 0, 0, 0 };
|
|
+EXPORT_SYMBOL_GPL(cg_regs_dummy);
|
|
+
|
|
+static int mtk_clk_dummy_enable(struct clk_hw *hw)
|
|
+{
|
|
+ return 0;
|
|
+}
|
|
+
|
|
+static void mtk_clk_dummy_disable(struct clk_hw *hw) { }
|
|
+
|
|
+const struct clk_ops mtk_clk_dummy_ops = {
|
|
+ .enable = mtk_clk_dummy_enable,
|
|
+ .disable = mtk_clk_dummy_disable,
|
|
+};
|
|
+EXPORT_SYMBOL_GPL(mtk_clk_dummy_ops);
|
|
+
|
|
static void mtk_init_clk_data(struct clk_hw_onecell_data *clk_data,
|
|
unsigned int clk_num)
|
|
{
|
|
--- a/drivers/clk/mediatek/clk-mtk.h
|
|
+++ b/drivers/clk/mediatek/clk-mtk.h
|
|
@@ -22,6 +22,25 @@
|
|
|
|
struct platform_device;
|
|
|
|
+/*
|
|
+ * We need the clock IDs to start from zero but to maintain devicetree
|
|
+ * backwards compatibility we can't change bindings to start from zero.
|
|
+ * Only a few platforms are affected, so we solve issues given by the
|
|
+ * commonized MTK clocks probe function(s) by adding a dummy clock at
|
|
+ * the beginning where needed.
|
|
+ */
|
|
+#define CLK_DUMMY 0
|
|
+
|
|
+extern const struct clk_ops mtk_clk_dummy_ops;
|
|
+extern const struct mtk_gate_regs cg_regs_dummy;
|
|
+
|
|
+#define GATE_DUMMY(_id, _name) { \
|
|
+ .id = _id, \
|
|
+ .name = _name, \
|
|
+ .regs = &cg_regs_dummy, \
|
|
+ .ops = &mtk_clk_dummy_ops, \
|
|
+ }
|
|
+
|
|
struct mtk_fixed_clk {
|
|
int id;
|
|
const char *name;
|