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5b4bbd1097
Refresh patches and fix changed path for 32-bit mediatek boards 'arch/arm/dts' -> 'arch/arm/dts/mediatek' Signed-off-by: Daniel Golle <daniel@makrotopia.org>
64 lines
2.1 KiB
Diff
64 lines
2.1 KiB
Diff
From a969b663c866129ed9eb217785a6574fbe826f1d Mon Sep 17 00:00:00 2001
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From: Daniel Golle <daniel@makrotopia.org>
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Date: Thu, 6 Apr 2023 23:36:50 +0100
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Subject: [PATCH] net: phy: mxl-gpy: don't use SGMII AN if using phylink
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MAC drivers using phylink expect SGMII in-band-status to be switched off
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when attached to a PHY. Make sure this is the case also for mxl-gpy which
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keeps SGMII in-band-status in case of SGMII interface mode is used.
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Signed-off-by: Daniel Golle <daniel@makrotopia.org>
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---
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drivers/net/phy/mxl-gpy.c | 19 ++++++++++++++++---
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1 file changed, 16 insertions(+), 3 deletions(-)
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--- a/drivers/net/phy/mxl-gpy.c
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+++ b/drivers/net/phy/mxl-gpy.c
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@@ -386,8 +386,11 @@ static bool gpy_2500basex_chk(struct phy
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phydev->speed = SPEED_2500;
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phydev->interface = PHY_INTERFACE_MODE_2500BASEX;
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- phy_modify_mmd(phydev, MDIO_MMD_VEND1, VSPEC1_SGMII_CTRL,
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- VSPEC1_SGMII_CTRL_ANEN, 0);
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+
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+ if (!phydev->phylink)
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+ phy_modify_mmd(phydev, MDIO_MMD_VEND1, VSPEC1_SGMII_CTRL,
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+ VSPEC1_SGMII_CTRL_ANEN, 0);
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+
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return true;
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}
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@@ -438,6 +441,14 @@ static int gpy_config_aneg(struct phy_de
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u32 adv;
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int ret;
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+ /* Disable SGMII auto-negotiation if using phylink */
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+ if (phydev->phylink) {
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+ ret = phy_modify_mmd(phydev, MDIO_MMD_VEND1, VSPEC1_SGMII_CTRL,
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+ VSPEC1_SGMII_CTRL_ANEN, 0);
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+ if (ret < 0)
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+ return ret;
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+ }
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+
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if (phydev->autoneg == AUTONEG_DISABLE) {
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/* Configure half duplex with genphy_setup_forced,
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* because genphy_c45_pma_setup_forced does not support.
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@@ -560,6 +571,8 @@ static int gpy_update_interface(struct p
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switch (phydev->speed) {
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case SPEED_2500:
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phydev->interface = PHY_INTERFACE_MODE_2500BASEX;
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+ if (phydev->phylink)
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+ break;
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ret = phy_modify_mmd(phydev, MDIO_MMD_VEND1, VSPEC1_SGMII_CTRL,
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VSPEC1_SGMII_CTRL_ANEN, 0);
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if (ret < 0) {
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@@ -573,7 +586,7 @@ static int gpy_update_interface(struct p
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case SPEED_100:
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case SPEED_10:
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phydev->interface = PHY_INTERFACE_MODE_SGMII;
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- if (gpy_sgmii_aneg_en(phydev))
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+ if (phydev->phylink || gpy_sgmii_aneg_en(phydev))
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break;
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/* Enable and restart SGMII ANEG for 10/100/1000Mbps link speed
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* if ANEG is disabled (in 2500-BaseX mode).
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