openwrt/target/linux/ramips/dts/mt7620a_planex_mzk-ex750np.dts
Adrian Schmutzler e4ce3109f2 ramips: simplify state_default/pinctrl0 in device DTS files
The node pinctrl0 is already set up in the SOC DTSI files, but
defined again as member of pinctrl in most of the device DTS(I)
files. This patch removes this redundancy for the entire ramips
target.

Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
2019-12-23 02:24:55 +01:00

156 lines
2.4 KiB
Plaintext

/dts-v1/;
#include "mt7620a.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
/ {
compatible = "planex,mzk-ex750np", "ralink,mt7620a-soc";
model = "Planex MZK-EX750NP";
aliases {
led-boot = &led_power;
led-failsafe = &led_power;
led-running = &led_power;
led-upgrade = &led_power;
};
leds {
compatible = "gpio-leds";
led_power: power {
label = "mzk-ex750np:red:power";
gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
};
wifi {
label = "mzk-ex750np:red:wifi";
gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
};
wps {
label = "mzk-ex750np:green:wps";
gpios = <&gpio0 10 GPIO_ACTIVE_LOW>;
};
rep {
label = "mzk-ex750np:blue:rep";
gpios = <&gpio2 16 GPIO_ACTIVE_LOW>;
};
wifi1 {
label = "mzk-ex750np:blue:wifi1";
gpios = <&gpio2 19 GPIO_ACTIVE_LOW>;
};
wifi2 {
label = "mzk-ex750np:blue:wifi2";
gpios = <&gpio2 18 GPIO_ACTIVE_LOW>;
};
wifi3 {
label = "mzk-ex750np:blue:wifi3";
gpios = <&gpio2 17 GPIO_ACTIVE_LOW>;
};
};
keys {
compatible = "gpio-keys";
reset {
label = "reset";
gpios = <&gpio0 9 GPIO_ACTIVE_LOW>;
linux,code = <KEY_RESTART>;
};
wps {
label = "wps";
gpios = <&gpio0 13 GPIO_ACTIVE_HIGH>;
linux,code = <KEY_RFKILL>;
};
};
};
&gpio2 {
status = "okay";
};
&gpio3 {
status = "okay";
};
&spi0 {
status = "okay";
m25p80@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <10000000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "u-boot";
reg = <0x0 0x30000>;
read-only;
};
partition@30000 {
label = "u-boot-env";
reg = <0x30000 0x10000>;
read-only;
};
factory: partition@40000 {
label = "factory";
reg = <0x40000 0x10000>;
read-only;
};
partition@50000 {
compatible = "denx,uimage";
label = "firmware";
reg = <0x50000 0x730000>;
};
partition@780000 {
label = "Udata";
reg = <0x780000 0x80000>;
};
};
};
};
&state_default {
gpio {
ralink,group = "uartf", "nd_sd", "rgmii2", "wled";
ralink,function = "gpio";
};
};
&ethernet {
pinctrl-names = "default";
pinctrl-0 = <&ephy_pins>;
mtd-mac-address = <&factory 0x4>;
mediatek,portmap = "llllw";
};
&wmac {
ralink,mtd-eeprom = <&factory 0>;
};
&pcie {
status = "okay";
};
&pcie0 {
mt76@0,0 {
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x8000>;
};
};