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https://github.com/openwrt/openwrt.git
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e55b4b436e
Some BCM63268 bootloaders may leave gpio registers, related to the roboswitch, disabled before loading the OpenWrt firmware. As result of this the switch won't work. These registers, if not enabled, probably avoid forwarding packets. Signed-off-by: Daniel González Cabanelas <dgcbueu@gmail.com>
118 lines
5.0 KiB
Diff
118 lines
5.0 KiB
Diff
--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
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+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
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@@ -1039,11 +1039,18 @@
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#define USBH_PRIV_SETUP_6368_REG 0x28
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#define USBH_PRIV_SETUP_IOC_SHIFT 4
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#define USBH_PRIV_SETUP_IOC_MASK (1 << USBH_PRIV_SETUP_IOC_SHIFT)
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+#define USBH_PRIV_SETUP_IPP_SHIFT 5
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+#define USBH_PRIV_SETUP_IPP_MASK (1 << USBH_PRIV_SETUP_IPP_SHIFT)
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#define USBH_PRIV_SETUP_6318_REG 0x00
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+#define USBH_PRIV_PLL_CTRL1_6368_REG 0x18
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#define USBH_PRIV_PLL_CTRL1_6318_REG 0x04
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-#define USBH_PRIV_PLL_CTRL1_SUSP_EN (1 << 27)
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-#define USBH_PRIV_PLL_CTRL1_IDDQ_PWRDN (1 << 31)
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+
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+#define USBH_PRIV_PLL_CTRL1_6318_SUSP_EN (1 << 27)
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+#define USBH_PRIV_PLL_CTRL1_6318_IDDQ_PWRDN (1 << 31)
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+#define USBH_PRIV_PLL_CTRL1_63268_IDDQ_PWRDN (1 << 9)
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+#define USBH_PRIV_PLL_CTRL1_63268_PWRDN_DELAY (1 << 10)
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+
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#define USBH_PRIV_SIM_CTRL_6318_REG 0x20
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#define USBH_PRIV_SIM_CTRL_LADDR_SEL (1 << 5)
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--- a/arch/mips/bcm63xx/Kconfig
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+++ b/arch/mips/bcm63xx/Kconfig
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@@ -73,6 +73,8 @@ config BCM63XX_CPU_63268
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bool "support 63268 CPU"
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select SYS_HAS_CPU_BMIPS4350
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select HAVE_PCI
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+ select BCM63XX_OHCI
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+ select BCM63XX_EHCI
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endmenu
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source "arch/mips/bcm63xx/boards/Kconfig"
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--- a/arch/mips/bcm63xx/dev-usb-ehci.c
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+++ b/arch/mips/bcm63xx/dev-usb-ehci.c
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@@ -82,7 +82,7 @@ static struct platform_device bcm63xx_eh
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int __init bcm63xx_ehci_register(void)
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{
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if (!BCMCPU_IS_6318() && !BCMCPU_IS_6328() && !BCMCPU_IS_6358() &&
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- !BCMCPU_IS_6362() && !BCMCPU_IS_6368())
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+ !BCMCPU_IS_6362() && !BCMCPU_IS_6368() && !BCMCPU_IS_63268())
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return 0;
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ehci_resources[0].start = bcm63xx_regset_address(RSET_EHCI0);
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--- a/arch/mips/bcm63xx/usb-common.c
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+++ b/arch/mips/bcm63xx/usb-common.c
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@@ -109,9 +109,24 @@ void bcm63xx_usb_priv_ohci_cfg_set(void)
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reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SETUP_6368_REG);
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reg |= USBH_PRIV_SETUP_IOC_MASK;
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bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SETUP_6368_REG);
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+ } else if (BCMCPU_IS_63268()) {
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+ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SWAP_6368_REG);
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+ reg &= ~USBH_PRIV_SWAP_OHCI_ENDN_MASK;
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+ reg |= USBH_PRIV_SWAP_OHCI_DATA_MASK;
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+ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SWAP_6368_REG);
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+
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+ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SETUP_6368_REG);
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+ reg |= USBH_PRIV_SETUP_IOC_MASK;
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+ reg &= ~USBH_PRIV_SETUP_IPP_MASK;
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+ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SETUP_6368_REG);
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+
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+ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_PLL_CTRL1_6368_REG);
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+ reg &= ~(USBH_PRIV_PLL_CTRL1_63268_IDDQ_PWRDN |
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+ USBH_PRIV_PLL_CTRL1_63268_PWRDN_DELAY);
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+ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_PLL_CTRL1_6368_REG);
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} else if (BCMCPU_IS_6318()) {
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reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_PLL_CTRL1_6318_REG);
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- reg |= USBH_PRIV_PLL_CTRL1_SUSP_EN;
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+ reg |= USBH_PRIV_PLL_CTRL1_6318_SUSP_EN;
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bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_PLL_CTRL1_6318_REG);
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reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SWAP_6318_REG);
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@@ -124,7 +139,7 @@ void bcm63xx_usb_priv_ohci_cfg_set(void)
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bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SETUP_6318_REG);
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reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_PLL_CTRL1_6318_REG);
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- reg &= ~USBH_PRIV_PLL_CTRL1_IDDQ_PWRDN;
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+ reg &= ~USBH_PRIV_PLL_CTRL1_6318_IDDQ_PWRDN;
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bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_PLL_CTRL1_6318_REG);
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reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SIM_CTRL_6318_REG);
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@@ -165,9 +180,24 @@ void bcm63xx_usb_priv_ehci_cfg_set(void)
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reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SETUP_6368_REG);
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reg |= USBH_PRIV_SETUP_IOC_MASK;
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bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SETUP_6368_REG);
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+ } else if (BCMCPU_IS_63268()) {
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+ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SWAP_6368_REG);
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+ reg &= ~USBH_PRIV_SWAP_EHCI_ENDN_MASK;
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+ reg |= USBH_PRIV_SWAP_EHCI_DATA_MASK;
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+ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SWAP_6368_REG);
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+
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+ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SETUP_6368_REG);
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+ reg |= USBH_PRIV_SETUP_IOC_MASK;
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+ reg &= ~USBH_PRIV_SETUP_IPP_MASK;
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+ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SETUP_6368_REG);
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+
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+ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_PLL_CTRL1_6368_REG);
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+ reg &= ~(USBH_PRIV_PLL_CTRL1_63268_IDDQ_PWRDN |
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+ USBH_PRIV_PLL_CTRL1_63268_PWRDN_DELAY);
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+ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_PLL_CTRL1_6368_REG);
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} else if (BCMCPU_IS_6318()) {
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reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_PLL_CTRL1_6318_REG);
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- reg |= USBH_PRIV_PLL_CTRL1_SUSP_EN;
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+ reg |= USBH_PRIV_PLL_CTRL1_6318_SUSP_EN;
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bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_PLL_CTRL1_6318_REG);
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reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SWAP_6318_REG);
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@@ -180,7 +210,7 @@ void bcm63xx_usb_priv_ehci_cfg_set(void)
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bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SETUP_6318_REG);
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reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_PLL_CTRL1_6318_REG);
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- reg &= ~USBH_PRIV_PLL_CTRL1_IDDQ_PWRDN;
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+ reg &= ~USBH_PRIV_PLL_CTRL1_6318_IDDQ_PWRDN;
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bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_PLL_CTRL1_6318_REG);
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reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SIM_CTRL_6318_REG);
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