openwrt/target/linux/bcm27xx/patches-5.15/950-0678-drm-vc4-Add-DRM-210101010-RGB-formats-for-hvs5.patch
John Audia d6d8851d12 kernel: bump 5.15 to 5.15.100
Manually rebased:
        bcm27xx/patches-5.15/950-0421-Support-RPi-DPI-interface-in-mode6-for-18-bit-color.patch
        bcm27xx/patches-5.15/950-0706-media-i2c-imx219-Scale-the-pixel-clock-rate-for-the-.patch
        ramips/patches-5.15/810-uvc-add-iPassion-iP2970-support.patch

Removed upstreamed:
        bcm27xx/patches-5.15/950-0707-drm-vc4-For-DPI-MEDIA_BUS_FMT_RGB565_1X16-is-mode-1-.patch[1]
        bcm27xx/patches-5.15/950-0596-drm-vc4-dpi-Add-option-for-inverting-pixel-clock-and.patch[2]
        ipq807x/0006-v5.16-arm64-dts-qcom-Fix-IPQ8074-PCIe-PHY-nodes.patch [3]
        ipq807x/0034-v6.1-arm64-dts-qcom-ipq8074-fix-PCIe-PHY-serdes-size.patch [4]
        ipq807x/0103-arm64-dts-qcom-ipq8074-fix-Gen2-PCIe-QMP-PHY.patch [5]
        ipq807x/0104-arm64-dts-qcom-ipq8074-fix-Gen3-PCIe-QMP-PHY.patch [6]
        ipq807x/0105-arm64-dts-qcom-ipq8074-correct-Gen2-PCIe-ranges.patch [7]
        ipq807x/0108-arm64-dts-qcom-ipq8074-fix-Gen3-PCIe-node.patch [8]
        ipq807x/0109-arm64-dts-qcom-ipq8074-correct-PCIe-QMP-PHY-output-c.patch [9]
        ipq807x/0132-arm64-dts-qcom-ipq8074-correct-USB3-QMP-PHY-s-clock-.patch [10]

All other patches automatically rebased.

1. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v5.15.99&id=d2991e6b30020e286f2dd9d3b4f43548c547caa6
2. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/drivers/gpu/drm/vc4/vc4_dpi.c?h=v5.15.100&id=8e04aaffb6de5f1ae61de7b671c1531172ccf429
3. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/arch/arm64/boot/dts/qcom/ipq8074.dtsi?h=v5.15.99&id=a55a645aa303a3f7ec37db69822d5420657626da
4. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/arch/arm64/boot/dts/qcom/ipq8074.dtsi?h=v5.15.99&id=d9df682bcea57fa25f37bbf17eae56fa05662635
5. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/arch/arm64/boot/dts/qcom/ipq8074.dtsi?h=v5.15.99&id=7e6eeb5fb3aa9e5feffdb6e137dcc06f5f6410e1
6. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/arch/arm64/boot/dts/qcom/ipq8074.dtsi?h=v5.15.99&id=e88204931d9a60634cd50bbc679f045439c4b91d
7.  https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/arch/arm64/boot/dts/qcom/ipq8074.dtsi?h=v5.15.99&id=1563af0f28afd3b6d64ac79a2aecced3969c90bf
8. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/arch/arm64/boot/dts/qcom/ipq8074.dtsi?h=v5.15.99&id=feb8c71f015d416f1afe90e1f62cf51e47376c67
9. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/arch/arm64/boot/dts/qcom/ipq8074.dtsi?h=v5.15.99&id=69c7a270357a7d50ffd3471b14c60250041200e3
10. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/arch/arm64/boot/dts/qcom/ipq8074.dtsi?h=v5.15.99&id=dd3d021ae5471d98adf81f1e897431c8657d0a18

Build system: x86_64
Build-tested: bcm2711/RPi4B, ramips/tplink_archer-a6-v3
Run-tested: bcm2711/RPi4B, ramips/tplink_archer-a6-v3

Signed-off-by: John Audia <therealgraysky@proton.me>
Tested-by: Robert Marko <robimarko@gmail.com> #ipq807x/Dynalink WRX36
Tested-by: Stefan Lippers-Hollmann <s.l-h@gmx.de> #ipq807x/ax3600, x86_64/FW-7543B, ath79/tl-wdr3600, ipq806x/g10, ipq806x/nbg6817
2023-03-18 12:52:17 +01:00

52 lines
1.5 KiB
Diff

From 9b3860cba9b5a36a2fb5023086e1217578e71076 Mon Sep 17 00:00:00 2001
From: Dave Stevenson <dave.stevenson@raspberrypi.com>
Date: Mon, 31 Jan 2022 16:28:43 +0000
Subject: [PATCH] drm/vc4: Add DRM 210101010 RGB formats for hvs5.
HVS5 supports the 210101010 RGB[A|X] formats, but they were
missing from the DRM to HVS mapping list, so weren't available.
Add them in.
Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
---
drivers/gpu/drm/vc4/vc4_plane.c | 28 ++++++++++++++++++++++++++++
1 file changed, 28 insertions(+)
--- a/drivers/gpu/drm/vc4/vc4_plane.c
+++ b/drivers/gpu/drm/vc4/vc4_plane.c
@@ -137,6 +137,34 @@ static const struct hvs_format {
.pixel_order = HVS_PIXEL_ORDER_XYCBCR,
.hvs5_only = true,
},
+ {
+ .drm = DRM_FORMAT_XRGB2101010,
+ .hvs = HVS_PIXEL_FORMAT_RGBA1010102,
+ .pixel_order = HVS_PIXEL_ORDER_ABGR,
+ .pixel_order_hvs5 = HVS_PIXEL_ORDER_ARGB,
+ .hvs5_only = true,
+ },
+ {
+ .drm = DRM_FORMAT_ARGB2101010,
+ .hvs = HVS_PIXEL_FORMAT_RGBA1010102,
+ .pixel_order = HVS_PIXEL_ORDER_ABGR,
+ .pixel_order_hvs5 = HVS_PIXEL_ORDER_ARGB,
+ .hvs5_only = true,
+ },
+ {
+ .drm = DRM_FORMAT_ABGR2101010,
+ .hvs = HVS_PIXEL_FORMAT_RGBA1010102,
+ .pixel_order = HVS_PIXEL_ORDER_ARGB,
+ .pixel_order_hvs5 = HVS_PIXEL_ORDER_ABGR,
+ .hvs5_only = true,
+ },
+ {
+ .drm = DRM_FORMAT_XBGR2101010,
+ .hvs = HVS_PIXEL_FORMAT_RGBA1010102,
+ .pixel_order = HVS_PIXEL_ORDER_ARGB,
+ .pixel_order_hvs5 = HVS_PIXEL_ORDER_ABGR,
+ .hvs5_only = true,
+ },
};
static const struct hvs_format *vc4_get_hvs_format(u32 drm_format)