openwrt/target/linux/ipq806x/patches-3.18/144-ARM-dts-qcom-Add-necessary-DT-data-for-Krait-cpufreq.patch
John Crispin 8e49b4b902 ipq806x: add & enable cpufreq support
This change set enables frequency scaling on ipq806x, which speeds-up
the CPU and allows it to achieve its max frequency.

These patches are cherry-picked & backported from the following location:
*130-132: linux-next
*133-143: LKML - https://lkml.org/lkml/2015/3/21/15
*144: derived from other qcom similar dts
*145: derived from https://chromium.googlesource.com/chromiumos/third_party/kernel/+/chromeos-3.14/drivers/cpufreq/cpufreq-krait.c

Signed-off-by: Mathieu Olivari <mathieu@codeaurora.org>

SVN-Revision: 45730
2015-05-23 15:28:02 +00:00

101 lines
2.3 KiB
Diff

--- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
@@ -23,6 +23,11 @@
next-level-cache = <&L2>;
qcom,acc = <&acc0>;
qcom,saw = <&saw0>;
+ clocks = <&kraitcc 0>;
+ clock-names = "cpu";
+ clock-latency = <100000>;
+ core-supply = <&smb208_s2a>;
+ voltage-tolerance = <5>;
};
cpu@1 {
@@ -33,11 +38,24 @@
next-level-cache = <&L2>;
qcom,acc = <&acc1>;
qcom,saw = <&saw1>;
+ clocks = <&kraitcc 1>;
+ clock-names = "cpu";
+ clock-latency = <100000>;
+ core-supply = <&smb208_s2b>;
};
L2: l2-cache {
compatible = "cache";
cache-level = <2>;
+ clocks = <&kraitcc 4>;
+ clock-names = "cache";
+ cache-points-kHz = <
+ /* kHz uV CPU kHz */
+ 1200000 1150000 1200000
+ 1000000 1100000 600000
+ 384000 1100000 384000
+ >;
+ vdd_dig-supply = <&smb208_s1a>;
};
};
@@ -70,6 +88,46 @@
};
};
+ kraitcc: clock-controller {
+ compatible = "qcom,krait-cc-v1";
+ #clock-cells = <1>;
+ };
+
+ qcom,pvs {
+ qcom,pvs-format-a;
+ qcom,speed0-pvs0-bin-v0 =
+ < 1400000000 1250000 >,
+ < 1200000000 1200000 >,
+ < 1000000000 1150000 >,
+ < 800000000 1100000 >,
+ < 600000000 1050000 >,
+ < 384000000 1000000 >;
+
+ qcom,speed0-pvs1-bin-v0 =
+ < 1400000000 1175000 >,
+ < 1200000000 1125000 >,
+ < 1000000000 1075000 >,
+ < 800000000 1025000 >,
+ < 600000000 975000 >,
+ < 384000000 925000 >;
+
+ qcom,speed0-pvs2-bin-v0 =
+ < 1400000000 1125000 >,
+ < 1200000000 1075000 >,
+ < 1000000000 1025000 >,
+ < 800000000 995000 >,
+ < 600000000 925000 >,
+ < 384000000 875000 >;
+
+ qcom,speed0-pvs3-bin-v0 =
+ < 1400000000 1050000 >,
+ < 1200000000 1000000 >,
+ < 1000000000 950000 >,
+ < 800000000 900000 >,
+ < 600000000 850000 >,
+ < 384000000 800000 >;
+ };
+
soc: soc {
#address-cells = <1>;
#size-cells = <1>;
@@ -170,11 +228,13 @@
acc0: clock-controller@2088000 {
compatible = "qcom,kpss-acc-v1";
reg = <0x02088000 0x1000>, <0x02008000 0x1000>;
+ clock-output-names = "acpu0_aux";
};
acc1: clock-controller@2098000 {
compatible = "qcom,kpss-acc-v1";
reg = <0x02098000 0x1000>, <0x02008000 0x1000>;
+ clock-output-names = "acpu1_aux";
};
l2cc: clock-controller@2011000 {