mirror of
https://github.com/openwrt/openwrt.git
synced 2024-12-21 22:47:56 +00:00
b357564463
Changelog: https://cdn.kernel.org/pub/linux/kernel/v6.x/ChangeLog-6.1.57 Manually rebased: generic/pending-6.1/702-net-ethernet-mtk_eth_soc-enable-threaded-NAPI.patch Removed upstreamed: qualcommax/patches-6.1/0134-PCI-qcom-Fixing-broken-pcie-enumeration-for-2_3_3-co.patch[1] All other patches automatically rebased. 1. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v6.1.57&id=2dfb5f324d799f4545e17631415aba6d302a8e2b Build system: x86/64 Build-tested: x86/64/AMD Cezanne Run-tested: x86/64/AMD Cezanne Reviewed-by: Robert Marko <robimarko@gmail.com> Signed-off-by: John Audia <therealgraysky@proton.me>
53 lines
1.7 KiB
Diff
53 lines
1.7 KiB
Diff
From eb8c75f82a6711387f3b9e03e28923f3e75a761b Mon Sep 17 00:00:00 2001
|
|
From: =?UTF-8?q?Alexis=20Lothor=C3=A9?= <alexis.lothore@bootlin.com>
|
|
Date: Mon, 29 May 2023 10:02:44 +0200
|
|
Subject: [PATCH 4/6] net: dsa: mv88e6xxx: fix 88E6393X family internal phys
|
|
layout
|
|
MIME-Version: 1.0
|
|
Content-Type: text/plain; charset=UTF-8
|
|
Content-Transfer-Encoding: 8bit
|
|
|
|
88E6393X/88E6193X/88E6191X switches have in fact 8 internal PHYs, but those
|
|
are not present starting at port 0: supported ports go from 1 to 8
|
|
|
|
Signed-off-by: Alexis Lothoré <alexis.lothore@bootlin.com>
|
|
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
|
|
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
|
|
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
|
|
---
|
|
drivers/net/dsa/mv88e6xxx/chip.c | 9 ++++++---
|
|
1 file changed, 6 insertions(+), 3 deletions(-)
|
|
|
|
--- a/drivers/net/dsa/mv88e6xxx/chip.c
|
|
+++ b/drivers/net/dsa/mv88e6xxx/chip.c
|
|
@@ -5944,7 +5944,8 @@ static const struct mv88e6xxx_info mv88e
|
|
.name = "Marvell 88E6191X",
|
|
.num_databases = 4096,
|
|
.num_ports = 11, /* 10 + Z80 */
|
|
- .num_internal_phys = 9,
|
|
+ .num_internal_phys = 8,
|
|
+ .internal_phys_offset = 1,
|
|
.max_vid = 8191,
|
|
.max_sid = 63,
|
|
.port_base_addr = 0x0,
|
|
@@ -5967,7 +5968,8 @@ static const struct mv88e6xxx_info mv88e
|
|
.name = "Marvell 88E6193X",
|
|
.num_databases = 4096,
|
|
.num_ports = 11, /* 10 + Z80 */
|
|
- .num_internal_phys = 9,
|
|
+ .num_internal_phys = 8,
|
|
+ .internal_phys_offset = 1,
|
|
.max_vid = 8191,
|
|
.max_sid = 63,
|
|
.port_base_addr = 0x0,
|
|
@@ -6286,7 +6288,8 @@ static const struct mv88e6xxx_info mv88e
|
|
.name = "Marvell 88E6393X",
|
|
.num_databases = 4096,
|
|
.num_ports = 11, /* 10 + Z80 */
|
|
- .num_internal_phys = 9,
|
|
+ .num_internal_phys = 8,
|
|
+ .internal_phys_offset = 1,
|
|
.max_vid = 8191,
|
|
.max_sid = 63,
|
|
.port_base_addr = 0x0,
|