openwrt/target/linux/ramips/dts/mt7621_mtc_wr1201.dts
Shiji Yang 901adc3f2f ramips: fix PCIe reset pins for MTC WR1201
This router has two reset pins, GPIO 8 and GPIO 19. We have to
configure them correctly to ensure that the wireless NICs work
properly.

Fixes: https://github.com/openwrt/openwrt/issues/11736
Signed-off-by: Shiji Yang <yangshiji66@qq.com>
Link: https://github.com/openwrt/openwrt/pull/16009
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
2024-07-29 01:09:24 +02:00

217 lines
3.4 KiB
Plaintext

#include "mt7621.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/leds/common.h>
/ {
compatible = "mtc,wr1201", "mediatek,mt7621-soc";
model = "MTC Wireless Router WR1201";
aliases {
led-boot = &led_power;
led-failsafe = &led_power;
led-running = &led_power;
led-upgrade = &led_power;
label-mac-device = &gmac0;
};
leds {
compatible = "gpio-leds";
led_power: power {
function = LED_FUNCTION_POWER;
color = <LED_COLOR_ID_GREEN>;
gpios = <&gpio 24 GPIO_ACTIVE_LOW>;
};
usb {
function = LED_FUNCTION_USB;
color = <LED_COLOR_ID_GREEN>;
gpios = <&gpio 22 GPIO_ACTIVE_LOW>;
trigger-sources = <&xhci_ehci_port1>, <&ehci_port2>;
linux,default-trigger = "usbport";
};
eth_link {
label = "green:eth_link";
gpios = <&gpio 26 GPIO_ACTIVE_LOW>;
};
wps {
function = LED_FUNCTION_WPS;
color = <LED_COLOR_ID_GREEN>;
gpios = <&gpio 23 GPIO_ACTIVE_LOW>;
};
};
keys {
compatible = "gpio-keys";
reset {
label = "reset";
gpios = <&gpio 25 GPIO_ACTIVE_LOW>;
linux,code = <KEY_RESTART>;
};
};
};
&spi0 {
status = "okay";
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <10000000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "Bootloader";
reg = <0x0 0x30000>;
read-only;
};
partition@30000 {
label = "Config";
reg = <0x30000 0x10000>;
read-only;
};
partition@40000 {
label = "factory";
reg = <0x40000 0x10000>;
read-only;
nvmem-layout {
compatible = "fixed-layout";
#address-cells = <1>;
#size-cells = <1>;
eeprom_factory_0: eeprom@0 {
reg = <0x0 0x200>;
};
eeprom_factory_8000: eeprom@8000 {
reg = <0x8000 0x200>;
};
macaddr_factory_4: macaddr@4 {
compatible = "mac-base";
reg = <0x4 0x6>;
#nvmem-cell-cells = <1>;
};
};
};
partition@50000 {
compatible = "denx,uimage";
label = "firmware";
reg = <0x50000 0xfa0000>;
};
partition@ff0000 {
label = "Second_Config";
reg = <0xff0000 0x10000>;
read-only;
};
};
};
};
&ethernet {
pinctrl-0 = <&mdio_pins>, <&rgmii1_pins>;
};
&gmac0 {
nvmem-cells = <&macaddr_factory_4 0>;
nvmem-cell-names = "mac-address";
};
&switch0 {
ports {
port@0 {
status = "okay";
label = "lan4";
};
port@1 {
status = "okay";
label = "lan3";
};
port@2 {
status = "okay";
label = "lan2";
};
port@3 {
status = "okay";
label = "lan1";
};
port@4 {
status = "okay";
label = "wan";
nvmem-cells = <&macaddr_factory_4 1>;
nvmem-cell-names = "mac-address";
};
};
};
&sdhci {
status = "okay";
};
&pcie_pins {
uart3 {
groups = "uart3";
function = "gpio";
};
};
&pcie {
status = "okay";
reset-gpios = <&gpio 8 GPIO_ACTIVE_LOW>,
<&gpio 19 GPIO_ACTIVE_LOW>;
};
&pcie0 {
wifi@0,0 {
reg = <0x0000 0 0 0 0>;
ieee80211-freq-limit = <5000000 6000000>;
nvmem-cells = <&eeprom_factory_8000>;
nvmem-cell-names = "eeprom";
led {
led-sources = <2>;
led-active-low;
};
};
};
&pcie1 {
wifi@0,0 {
reg = <0x0000 0 0 0 0>;
ieee80211-freq-limit = <2400000 2500000>;
nvmem-cells = <&eeprom_factory_0>;
nvmem-cell-names = "eeprom";
led {
led-sources = <2>;
led-active-low;
};
};
};
&state_default {
gpio {
groups = "rgmii2";
function = "gpio";
};
};