Shiji Yang 8d4c22a956 ath79: add missing clock name strings in SoC dtsi ...

For all SoC in the ath79 target, the PLL controller provides 3 main
clocks "cpu", "ddr" and "ahb" through the input clock "ref".

Signed-off-by: Shiji Yang <yangshiji66@qq.com>

2022-11-09 22:55:33 +01:00

..

imagebuilder

imagebuilder: export SOURCE_DATE_EPOCH to environment

2022-04-10 00:56:38 +01:00

linux

ath79: add missing clock name strings in SoC dtsi

2022-11-09 22:55:33 +01:00

llvm-bpf

llvm-bpf: fix rebuild check for generating tarball

2021-11-26 11:37:19 +01:00

sdk

sdk: use git-src-full to allow Git versioning

2022-11-06 17:08:23 +01:00

toolchain

toolchain: switch packaged toolchain to tar.xz

2021-10-21 08:25:38 -10:00

Config.in

base-files: add eMMC sysupgrade support

2021-12-02 20:42:58 +00:00

Makefile

tools/llvm-bpf: move tarball packing to target/llvm-bpf

2021-11-22 12:00:40 +01:00