openwrt/target/linux/ramips/dts/mt7620a_planex_mzk-750dhp.dts
Michael Pratt 953bfe2eb3 ramips: mt7620: simplify DTS properties for GMAC
There are only 2 options in the driver
for the function of mt7620 internal switch port 4:

  EPHY mode (RJ-45, internal PHY)
  GMAC mode (RGMII, external PHY)

Let the DTS property be boolean instead of string
where EPHY mode is the default.

Fix how the properties are written
for all DTS that use them,
and add missing nodes where applicable,
and remove useless nodes,
and minor DTS formatting.

Signed-off-by: Michael Pratt <mcpratt@pm.me>
2021-06-23 14:22:18 +08:00

131 lines
1.9 KiB
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#include "mt7620a.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
/ {
compatible = "planex,mzk-750dhp", "ralink,mt7620a-soc";
model = "Planex MZK-750DHP";
aliases {
led-boot = &led_power;
led-failsafe = &led_power;
led-running = &led_power;
led-upgrade = &led_power;
};
leds {
compatible = "gpio-leds";
wps {
label = "green:wps";
gpios = <&gpio2 15 GPIO_ACTIVE_LOW>;
};
led_power: power {
label = "green:power";
gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
};
wlan5g {
label = "green:wlan5g";
gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
};
};
keys {
compatible = "gpio-keys";
s1 {
label = "reset";
gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
linux,code = <KEY_RESTART>;
};
s2 {
label = "wps";
gpios = <&gpio2 19 GPIO_ACTIVE_LOW>;
linux,code = <KEY_WPS_BUTTON>;
};
};
};
&gpio1 {
status = "okay";
};
&gpio2 {
status = "okay";
};
&spi0 {
status = "okay";
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <10000000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "u-boot";
reg = <0x0 0x30000>;
read-only;
};
partition@30000 {
label = "u-boot-env";
reg = <0x30000 0x10000>;
read-only;
};
factory: partition@40000 {
label = "factory";
reg = <0x40000 0x10000>;
read-only;
};
partition@50000 {
compatible = "denx,uimage";
label = "firmware";
reg = <0x50000 0x7b0000>;
};
};
};
};
&state_default {
gpio {
groups = "i2c", "spi refclk", "rgmii1", "nd_sd";
function = "gpio";
};
};
&ethernet {
pinctrl-names = "default";
pinctrl-0 = <&ephy_pins>;
mtd-mac-address = <&factory 0x4>;
mediatek,portmap = "llllw";
};
&wmac {
ralink,mtd-eeprom = <&factory 0x0>;
};
&pcie {
status = "okay";
};
&pcie0 {
mt76@0,0 {
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&factory 0x8000>;
};
};