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https://github.com/openwrt/openwrt.git
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910bdda6af
All patches automatically rebased. Build system: x86_64 Build-tested: bcm2711/RPi4B, mt7622/RT3200 Run-tested: bcm2711/RPi4B, mt7622/RT3200 Signed-off-by: John Audia <therealgraysky@proton.me>
342 lines
12 KiB
Diff
342 lines
12 KiB
Diff
From 34ae2c09d46a2d0abd907e139b466f798e4095a8 Mon Sep 17 00:00:00 2001
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From: "Russell King (Oracle)" <rmk+kernel@armlinux.org.uk>
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Date: Mon, 15 Nov 2021 10:00:27 +0000
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Subject: [PATCH] net: phylink: add generic validate implementation
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Add a generic validate() implementation using the supported_interfaces
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and a bitmask of MAC pause/speed/duplex capabilities. This allows us
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to entirely eliminate many driver private validate() implementations.
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We expose the underlying phylink_get_linkmodes() function so that
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drivers which have special needs can still benefit from conversion.
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Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
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Signed-off-by: David S. Miller <davem@davemloft.net>
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---
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drivers/net/phy/phylink.c | 252 ++++++++++++++++++++++++++++++++++++++
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include/linux/phylink.h | 31 +++++
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2 files changed, 283 insertions(+)
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--- a/drivers/net/phy/phylink.c
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+++ b/drivers/net/phy/phylink.c
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@@ -172,6 +172,258 @@ static int phylink_validate_mac_and_pcs(
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return phylink_is_empty_linkmode(supported) ? -EINVAL : 0;
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}
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+static void phylink_caps_to_linkmodes(unsigned long *linkmodes,
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+ unsigned long caps)
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+{
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+ if (caps & MAC_SYM_PAUSE)
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+ __set_bit(ETHTOOL_LINK_MODE_Pause_BIT, linkmodes);
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+
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+ if (caps & MAC_ASYM_PAUSE)
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+ __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, linkmodes);
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+
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+ if (caps & MAC_10HD)
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+ __set_bit(ETHTOOL_LINK_MODE_10baseT_Half_BIT, linkmodes);
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+
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+ if (caps & MAC_10FD)
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+ __set_bit(ETHTOOL_LINK_MODE_10baseT_Full_BIT, linkmodes);
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+
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+ if (caps & MAC_100HD) {
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+ __set_bit(ETHTOOL_LINK_MODE_100baseT_Half_BIT, linkmodes);
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+ __set_bit(ETHTOOL_LINK_MODE_100baseFX_Half_BIT, linkmodes);
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+ }
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+
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+ if (caps & MAC_100FD) {
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+ __set_bit(ETHTOOL_LINK_MODE_100baseT_Full_BIT, linkmodes);
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+ __set_bit(ETHTOOL_LINK_MODE_100baseT1_Full_BIT, linkmodes);
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+ __set_bit(ETHTOOL_LINK_MODE_100baseFX_Full_BIT, linkmodes);
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+ }
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+
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+ if (caps & MAC_1000HD)
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+ __set_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT, linkmodes);
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+
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+ if (caps & MAC_1000FD) {
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+ __set_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, linkmodes);
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+ __set_bit(ETHTOOL_LINK_MODE_1000baseX_Full_BIT, linkmodes);
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+ __set_bit(ETHTOOL_LINK_MODE_1000baseT1_Full_BIT, linkmodes);
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+ }
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+
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+ if (caps & MAC_2500FD) {
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+ __set_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT, linkmodes);
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+ __set_bit(ETHTOOL_LINK_MODE_2500baseX_Full_BIT, linkmodes);
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+ }
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+
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+ if (caps & MAC_5000FD)
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+ __set_bit(ETHTOOL_LINK_MODE_5000baseT_Full_BIT, linkmodes);
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+
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+ if (caps & MAC_10000FD) {
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+ __set_bit(ETHTOOL_LINK_MODE_10000baseT_Full_BIT, linkmodes);
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+ __set_bit(ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT, linkmodes);
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+ __set_bit(ETHTOOL_LINK_MODE_10000baseKR_Full_BIT, linkmodes);
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+ __set_bit(ETHTOOL_LINK_MODE_10000baseR_FEC_BIT, linkmodes);
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+ __set_bit(ETHTOOL_LINK_MODE_10000baseCR_Full_BIT, linkmodes);
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+ __set_bit(ETHTOOL_LINK_MODE_10000baseSR_Full_BIT, linkmodes);
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+ __set_bit(ETHTOOL_LINK_MODE_10000baseLR_Full_BIT, linkmodes);
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+ __set_bit(ETHTOOL_LINK_MODE_10000baseLRM_Full_BIT, linkmodes);
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+ __set_bit(ETHTOOL_LINK_MODE_10000baseER_Full_BIT, linkmodes);
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+ }
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+
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+ if (caps & MAC_25000FD) {
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+ __set_bit(ETHTOOL_LINK_MODE_25000baseCR_Full_BIT, linkmodes);
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+ __set_bit(ETHTOOL_LINK_MODE_25000baseKR_Full_BIT, linkmodes);
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+ __set_bit(ETHTOOL_LINK_MODE_25000baseSR_Full_BIT, linkmodes);
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+ }
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+
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+ if (caps & MAC_40000FD) {
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+ __set_bit(ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT, linkmodes);
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+ __set_bit(ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT, linkmodes);
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+ __set_bit(ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT, linkmodes);
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+ __set_bit(ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT, linkmodes);
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+ }
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+
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+ if (caps & MAC_50000FD) {
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+ __set_bit(ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT, linkmodes);
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+ __set_bit(ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT, linkmodes);
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+ __set_bit(ETHTOOL_LINK_MODE_50000baseSR2_Full_BIT, linkmodes);
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+ __set_bit(ETHTOOL_LINK_MODE_50000baseKR_Full_BIT, linkmodes);
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+ __set_bit(ETHTOOL_LINK_MODE_50000baseSR_Full_BIT, linkmodes);
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+ __set_bit(ETHTOOL_LINK_MODE_50000baseCR_Full_BIT, linkmodes);
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+ __set_bit(ETHTOOL_LINK_MODE_50000baseLR_ER_FR_Full_BIT,
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+ linkmodes);
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+ __set_bit(ETHTOOL_LINK_MODE_50000baseDR_Full_BIT, linkmodes);
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+ }
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+
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+ if (caps & MAC_56000FD) {
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+ __set_bit(ETHTOOL_LINK_MODE_56000baseKR4_Full_BIT, linkmodes);
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+ __set_bit(ETHTOOL_LINK_MODE_56000baseCR4_Full_BIT, linkmodes);
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+ __set_bit(ETHTOOL_LINK_MODE_56000baseSR4_Full_BIT, linkmodes);
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+ __set_bit(ETHTOOL_LINK_MODE_56000baseLR4_Full_BIT, linkmodes);
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+ }
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+
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+ if (caps & MAC_100000FD) {
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+ __set_bit(ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT, linkmodes);
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+ __set_bit(ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT, linkmodes);
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+ __set_bit(ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT, linkmodes);
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+ __set_bit(ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT,
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+ linkmodes);
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+ __set_bit(ETHTOOL_LINK_MODE_100000baseKR2_Full_BIT, linkmodes);
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+ __set_bit(ETHTOOL_LINK_MODE_100000baseSR2_Full_BIT, linkmodes);
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+ __set_bit(ETHTOOL_LINK_MODE_100000baseCR2_Full_BIT, linkmodes);
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+ __set_bit(ETHTOOL_LINK_MODE_100000baseLR2_ER2_FR2_Full_BIT,
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+ linkmodes);
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+ __set_bit(ETHTOOL_LINK_MODE_100000baseDR2_Full_BIT, linkmodes);
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+ __set_bit(ETHTOOL_LINK_MODE_100000baseKR_Full_BIT, linkmodes);
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+ __set_bit(ETHTOOL_LINK_MODE_100000baseSR_Full_BIT, linkmodes);
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+ __set_bit(ETHTOOL_LINK_MODE_100000baseLR_ER_FR_Full_BIT,
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+ linkmodes);
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+ __set_bit(ETHTOOL_LINK_MODE_100000baseCR_Full_BIT, linkmodes);
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+ __set_bit(ETHTOOL_LINK_MODE_100000baseDR_Full_BIT, linkmodes);
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+ }
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+
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+ if (caps & MAC_200000FD) {
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+ __set_bit(ETHTOOL_LINK_MODE_200000baseKR4_Full_BIT, linkmodes);
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+ __set_bit(ETHTOOL_LINK_MODE_200000baseSR4_Full_BIT, linkmodes);
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+ __set_bit(ETHTOOL_LINK_MODE_200000baseLR4_ER4_FR4_Full_BIT,
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+ linkmodes);
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+ __set_bit(ETHTOOL_LINK_MODE_200000baseDR4_Full_BIT, linkmodes);
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+ __set_bit(ETHTOOL_LINK_MODE_200000baseCR4_Full_BIT, linkmodes);
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+ __set_bit(ETHTOOL_LINK_MODE_200000baseKR2_Full_BIT, linkmodes);
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+ __set_bit(ETHTOOL_LINK_MODE_200000baseSR2_Full_BIT, linkmodes);
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+ __set_bit(ETHTOOL_LINK_MODE_200000baseLR2_ER2_FR2_Full_BIT,
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+ linkmodes);
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+ __set_bit(ETHTOOL_LINK_MODE_200000baseDR2_Full_BIT, linkmodes);
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+ __set_bit(ETHTOOL_LINK_MODE_200000baseCR2_Full_BIT, linkmodes);
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+ }
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+
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+ if (caps & MAC_400000FD) {
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+ __set_bit(ETHTOOL_LINK_MODE_400000baseKR8_Full_BIT, linkmodes);
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+ __set_bit(ETHTOOL_LINK_MODE_400000baseSR8_Full_BIT, linkmodes);
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+ __set_bit(ETHTOOL_LINK_MODE_400000baseLR8_ER8_FR8_Full_BIT,
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+ linkmodes);
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+ __set_bit(ETHTOOL_LINK_MODE_400000baseDR8_Full_BIT, linkmodes);
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+ __set_bit(ETHTOOL_LINK_MODE_400000baseCR8_Full_BIT, linkmodes);
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+ __set_bit(ETHTOOL_LINK_MODE_400000baseKR4_Full_BIT, linkmodes);
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+ __set_bit(ETHTOOL_LINK_MODE_400000baseSR4_Full_BIT, linkmodes);
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+ __set_bit(ETHTOOL_LINK_MODE_400000baseLR4_ER4_FR4_Full_BIT,
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+ linkmodes);
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+ __set_bit(ETHTOOL_LINK_MODE_400000baseDR4_Full_BIT, linkmodes);
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+ __set_bit(ETHTOOL_LINK_MODE_400000baseCR4_Full_BIT, linkmodes);
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+ }
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+}
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+
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+/**
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+ * phylink_get_linkmodes() - get acceptable link modes
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+ * @linkmodes: ethtool linkmode mask (must be already initialised)
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+ * @interface: phy interface mode defined by &typedef phy_interface_t
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+ * @mac_capabilities: bitmask of MAC capabilities
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+ *
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+ * Set all possible pause, speed and duplex linkmodes in @linkmodes that
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+ * are supported by the @interface mode and @mac_capabilities. @linkmodes
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+ * must have been initialised previously.
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+ */
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+void phylink_get_linkmodes(unsigned long *linkmodes, phy_interface_t interface,
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+ unsigned long mac_capabilities)
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+{
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+ unsigned long caps = MAC_SYM_PAUSE | MAC_ASYM_PAUSE;
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+
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+ switch (interface) {
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+ case PHY_INTERFACE_MODE_USXGMII:
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+ caps |= MAC_10000FD | MAC_5000FD | MAC_2500FD;
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+ fallthrough;
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+
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+ case PHY_INTERFACE_MODE_RGMII_TXID:
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+ case PHY_INTERFACE_MODE_RGMII_RXID:
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+ case PHY_INTERFACE_MODE_RGMII_ID:
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+ case PHY_INTERFACE_MODE_RGMII:
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+ case PHY_INTERFACE_MODE_QSGMII:
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+ case PHY_INTERFACE_MODE_SGMII:
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+ case PHY_INTERFACE_MODE_GMII:
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+ caps |= MAC_1000HD | MAC_1000FD;
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+ fallthrough;
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+
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+ case PHY_INTERFACE_MODE_REVRMII:
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+ case PHY_INTERFACE_MODE_RMII:
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+ case PHY_INTERFACE_MODE_REVMII:
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+ case PHY_INTERFACE_MODE_MII:
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+ caps |= MAC_10HD | MAC_10FD;
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+ fallthrough;
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+
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+ case PHY_INTERFACE_MODE_100BASEX:
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+ caps |= MAC_100HD | MAC_100FD;
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+ break;
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+
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+ case PHY_INTERFACE_MODE_TBI:
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+ case PHY_INTERFACE_MODE_MOCA:
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+ case PHY_INTERFACE_MODE_RTBI:
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+ case PHY_INTERFACE_MODE_1000BASEX:
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+ caps |= MAC_1000HD;
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+ fallthrough;
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+ case PHY_INTERFACE_MODE_TRGMII:
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+ caps |= MAC_1000FD;
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+ break;
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+
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+ case PHY_INTERFACE_MODE_2500BASEX:
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+ caps |= MAC_2500FD;
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+ break;
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+
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+ case PHY_INTERFACE_MODE_5GBASER:
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+ caps |= MAC_5000FD;
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+ break;
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+
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+ case PHY_INTERFACE_MODE_XGMII:
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+ case PHY_INTERFACE_MODE_RXAUI:
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+ case PHY_INTERFACE_MODE_XAUI:
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+ case PHY_INTERFACE_MODE_10GBASER:
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+ case PHY_INTERFACE_MODE_10GKR:
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+ caps |= MAC_10000FD;
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+ break;
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+
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+ case PHY_INTERFACE_MODE_25GBASER:
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+ caps |= MAC_25000FD;
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+ break;
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+
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+ case PHY_INTERFACE_MODE_XLGMII:
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+ caps |= MAC_40000FD;
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+ break;
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+
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+ case PHY_INTERFACE_MODE_INTERNAL:
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+ caps |= ~0;
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+ break;
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+
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+ case PHY_INTERFACE_MODE_NA:
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+ case PHY_INTERFACE_MODE_MAX:
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+ case PHY_INTERFACE_MODE_SMII:
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+ break;
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+ }
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+
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+ phylink_caps_to_linkmodes(linkmodes, caps & mac_capabilities);
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+}
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+EXPORT_SYMBOL_GPL(phylink_get_linkmodes);
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+
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+/**
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+ * phylink_generic_validate() - generic validate() callback implementation
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+ * @config: a pointer to a &struct phylink_config.
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+ * @supported: ethtool bitmask for supported link modes.
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+ * @state: a pointer to a &struct phylink_link_state.
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+ *
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+ * Generic implementation of the validate() callback that MAC drivers can
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+ * use when they pass the range of supported interfaces and MAC capabilities.
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+ * This makes use of phylink_get_linkmodes().
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+ */
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+void phylink_generic_validate(struct phylink_config *config,
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+ unsigned long *supported,
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+ struct phylink_link_state *state)
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+{
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+ __ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, };
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+
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+ phylink_set_port_modes(mask);
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+ phylink_set(mask, Autoneg);
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+ phylink_get_linkmodes(mask, state->interface, config->mac_capabilities);
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+
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+ linkmode_and(supported, supported, mask);
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+ linkmode_and(state->advertising, state->advertising, mask);
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+}
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+EXPORT_SYMBOL_GPL(phylink_generic_validate);
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+
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static int phylink_validate_any(struct phylink *pl, unsigned long *supported,
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struct phylink_link_state *state)
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{
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--- a/include/linux/phylink.h
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+++ b/include/linux/phylink.h
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@@ -20,6 +20,29 @@ enum {
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MLO_AN_PHY = 0, /* Conventional PHY */
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MLO_AN_FIXED, /* Fixed-link mode */
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MLO_AN_INBAND, /* In-band protocol */
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+
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+ MAC_SYM_PAUSE = BIT(0),
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+ MAC_ASYM_PAUSE = BIT(1),
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+ MAC_10HD = BIT(2),
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+ MAC_10FD = BIT(3),
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+ MAC_10 = MAC_10HD | MAC_10FD,
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+ MAC_100HD = BIT(4),
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+ MAC_100FD = BIT(5),
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+ MAC_100 = MAC_100HD | MAC_100FD,
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+ MAC_1000HD = BIT(6),
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+ MAC_1000FD = BIT(7),
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+ MAC_1000 = MAC_1000HD | MAC_1000FD,
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+ MAC_2500FD = BIT(8),
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+ MAC_5000FD = BIT(9),
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+ MAC_10000FD = BIT(10),
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+ MAC_20000FD = BIT(11),
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+ MAC_25000FD = BIT(12),
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+ MAC_40000FD = BIT(13),
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+ MAC_50000FD = BIT(14),
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+ MAC_56000FD = BIT(15),
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+ MAC_100000FD = BIT(16),
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+ MAC_200000FD = BIT(17),
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+ MAC_400000FD = BIT(18),
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};
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static inline bool phylink_autoneg_inband(unsigned int mode)
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@@ -70,6 +93,7 @@ enum phylink_op_type {
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* if MAC link is at %MLO_AN_FIXED mode.
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* @supported_interfaces: bitmap describing which PHY_INTERFACE_MODE_xxx
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* are supported by the MAC/PCS.
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+ * @mac_capabilities: MAC pause/speed/duplex capabilities.
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*/
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struct phylink_config {
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struct device *dev;
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@@ -81,6 +105,7 @@ struct phylink_config {
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void (*get_fixed_state)(struct phylink_config *config,
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struct phylink_link_state *state);
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DECLARE_PHY_INTERFACE_MASK(supported_interfaces);
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+ unsigned long mac_capabilities;
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};
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/**
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@@ -462,6 +487,12 @@ void pcs_link_up(struct phylink_pcs *pcs
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phy_interface_t interface, int speed, int duplex);
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#endif
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+void phylink_get_linkmodes(unsigned long *linkmodes, phy_interface_t interface,
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+ unsigned long mac_capabilities);
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+void phylink_generic_validate(struct phylink_config *config,
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+ unsigned long *supported,
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+ struct phylink_link_state *state);
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+
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struct phylink *phylink_create(struct phylink_config *, struct fwnode_handle *,
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phy_interface_t iface,
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const struct phylink_mac_ops *mac_ops);
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