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8d1567ba61
The higher 16-bit of EEE register was overwritten by mistake, fix that.
Fixes: 5b9ba4a93e ("generic: mt7530: support adjusting EEE")
Signed-off-by: DENG Qingfang <dqfext@gmail.com>
122 lines
3.6 KiB
Diff
122 lines
3.6 KiB
Diff
From 9cfb2d426c38272f245e9e6f62b3552d1ed5852b Mon Sep 17 00:00:00 2001
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From: =?UTF-8?q?Ren=C3=A9=20van=20Dorst?= <opensource@vdorst.com>
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Date: Tue, 21 Apr 2020 00:18:08 +0200
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Subject: [PATCH] net: dsa: mt7530: Support EEE features
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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Signed-off-by: René van Dorst <opensource@vdorst.com>
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--- a/drivers/net/dsa/mt7530.c
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+++ b/drivers/net/dsa/mt7530.c
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@@ -1417,9 +1417,13 @@ static void mt7530_phylink_mac_config(st
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switch (state->speed) {
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case SPEED_1000:
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mcr_new |= PMCR_FORCE_SPEED_1000;
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+ if (priv->eee_enable & BIT(port))
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+ mcr_new |= PMCR_FORCE_EEE1G;
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break;
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case SPEED_100:
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mcr_new |= PMCR_FORCE_SPEED_100;
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+ if (priv->eee_enable & BIT(port))
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+ mcr_new |= PMCR_FORCE_EEE100;
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break;
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}
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if (state->duplex == DUPLEX_FULL) {
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@@ -1555,6 +1559,54 @@ mt7530_phylink_mac_link_state(struct dsa
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return 1;
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}
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+static int mt7530_get_mac_eee(struct dsa_switch *ds, int port,
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+ struct ethtool_eee *e)
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+{
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+ struct mt7530_priv *priv = ds->priv;
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+ u32 eeecr, pmsr;
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+
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+ e->eee_enabled = !!(priv->eee_enable & BIT(port));
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+
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+ if (e->eee_enabled) {
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+ eeecr = mt7530_read(priv, MT7530_PMEEECR_P(port));
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+ e->tx_lpi_enabled = !(eeecr & LPI_MODE_EN);
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+ e->tx_lpi_timer = (eeecr >> 4) & 0xFFF;
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+ pmsr = mt7530_read(priv, MT7530_PMSR_P(port));
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+ e->eee_active = e->eee_enabled && !!(pmsr & PMSR_EEE1G);
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+ } else {
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+ e->tx_lpi_enabled = 0;
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+ e->tx_lpi_timer = 0;
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+ e->eee_active = 0;
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+ }
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+
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+ return 0;
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+}
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+
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+static int mt7530_set_mac_eee(struct dsa_switch *ds, int port,
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+ struct ethtool_eee *e)
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+{
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+ struct mt7530_priv *priv = ds->priv;
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+ u32 eeecr;
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+
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+ if (e->tx_lpi_enabled && e->tx_lpi_timer > 0xFFF)
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+ return -EINVAL;
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+
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+ if (e->eee_enabled) {
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+ priv->eee_enable |= BIT(port);
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+ //MT7530_PMEEECR_P
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+ eeecr = mt7530_read(priv, MT7530_PMEEECR_P(port));
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+ eeecr &= 0xFFFF0000;
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+ if (!e->tx_lpi_enabled)
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+ eeecr |= LPI_MODE_EN;
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+ eeecr |= LPI_THRESH(e->tx_lpi_timer);
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+ mt7530_write(priv, MT7530_PMEEECR_P(port), eeecr);
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+ } else {
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+ priv->eee_enable &= ~(BIT(port));
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+ }
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+
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+ return 0;
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+}
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+
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static const struct dsa_switch_ops mt7530_switch_ops = {
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.get_tag_protocol = mtk_get_tag_protocol,
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.setup = mt7530_setup,
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@@ -1582,6 +1634,8 @@ static const struct dsa_switch_ops mt753
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.phylink_mac_config = mt7530_phylink_mac_config,
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.phylink_mac_link_down = mt7530_phylink_mac_link_down,
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.phylink_mac_link_up = mt7530_phylink_mac_link_up,
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+ .get_mac_eee = mt7530_get_mac_eee,
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+ .set_mac_eee = mt7530_set_mac_eee,
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};
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static const struct of_device_id mt7530_of_match[] = {
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--- a/drivers/net/dsa/mt7530.h
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+++ b/drivers/net/dsa/mt7530.h
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@@ -212,6 +212,8 @@ enum mt7530_vlan_port_attr {
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#define PMCR_RX_EN BIT(13)
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#define PMCR_BACKOFF_EN BIT(9)
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#define PMCR_BACKPR_EN BIT(8)
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+#define PMCR_FORCE_EEE1G BIT(7)
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+#define PMCR_FORCE_EEE100 BIT(6)
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#define PMCR_TX_FC_EN BIT(5)
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#define PMCR_RX_FC_EN BIT(4)
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#define PMCR_FORCE_SPEED_1000 BIT(3)
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@@ -233,6 +235,12 @@ enum mt7530_vlan_port_attr {
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#define PMSR_DPX BIT(1)
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#define PMSR_LINK BIT(0)
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+#define MT7530_PMEEECR_P(x) (0x3004 + (x) * 0x100)
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+#define WAKEUP_TIME_1000(x) ((x & 0xFF) << 24)
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+#define WAKEUP_TIME_100(x) ((x & 0xFF) << 16)
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+#define LPI_THRESH(x) ((x & 0xFFF) << 4)
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+#define LPI_MODE_EN BIT(0)
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+
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/* Register for MIB */
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#define MT7530_PORT_MIB_COUNTER(x) (0x4000 + (x) * 0x100)
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#define MT7530_MIB_CCR 0x4fe0
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@@ -471,6 +479,7 @@ struct mt7530_priv {
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unsigned int p5_intf_sel;
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u8 mirror_rx;
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u8 mirror_tx;
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+ u8 eee_enable;
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struct mt7530_port ports[MT7530_NUM_PORTS];
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/* protect among processes for registers access*/
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