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9ac80a47ea
Tested on Luxul XWR-3150 (boot, NAND, PCIe, switch, Ethernet). Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
63 lines
2.5 KiB
Diff
63 lines
2.5 KiB
Diff
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
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Date: Tue, 23 Nov 2021 13:13:05 +0100
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Subject: [PATCH] ARM: dts: BCM5301X: Switch back to old clock nodes names
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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First of all using the same node name prefix resulted in trying to
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register 2 clocks under the same "clock-controller" name:
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[ 0.000000] __clk_core_init: clk clock-controller already initialized
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[ 0.000000] ------------[ cut here ]------------
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[ 0.000000] WARNING: CPU: 0 PID: 0 at drivers/clk/bcm/clk-iproc-pll.c:802 iproc_pll_clk_setup+0x4c8/0x4f4
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[ 0.000000] Modules linked in:
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[ 0.000000] CPU: 0 PID: 0 Comm: swapper/0 Not tainted 5.10.80 #0
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[ 0.000000] Hardware name: BCM5301X
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[ 0.000000] [<c0108410>] (unwind_backtrace) from [<c0104bc4>] (show_stack+0x10/0x14)
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[ 0.000000] [<c0104bc4>] (show_stack) from [<c03dca28>] (dump_stack+0x94/0xa8)
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[ 0.000000] [<c03dca28>] (dump_stack) from [<c0118440>] (__warn+0xb8/0x114)
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[ 0.000000] [<c0118440>] (__warn) from [<c0118504>] (warn_slowpath_fmt+0x68/0x78)
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[ 0.000000] [<c0118504>] (warn_slowpath_fmt) from [<c043281c>] (iproc_pll_clk_setup+0x4c8/0x4f4)
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[ 0.000000] [<c043281c>] (iproc_pll_clk_setup) from [<c0818c04>] (nsp_genpll_clk_init+0x30/0x38)
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[ 0.000000] [<c0818c04>] (nsp_genpll_clk_init) from [<c0818634>] (of_clk_init+0x118/0x1f8)
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[ 0.000000] [<c0818634>] (of_clk_init) from [<c08039b0>] (time_init+0x24/0x30)
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[ 0.000000] [<c08039b0>] (time_init) from [<c0800d14>] (start_kernel+0x398/0x50c)
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[ 0.000000] [<c0800d14>] (start_kernel) from [<00000000>] (0x0)
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[ 0.000000] ---[ end trace fe236bfe9559ee50 ]---
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Secondly using any other names than "lcpll0" and "genpll" breaks output
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clocks:
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$ cat /sys/kernel/debug/clk/usbclk/clk_rate
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0
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For some reason iproc_clk_recalc_rate() gets called with "parent_rate"
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argument 0 whenever clocks aren't named "lcpll0" and "genpll".
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Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
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---
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arch/arm/boot/dts/bcm5301x.dtsi | 4 ++--
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1 file changed, 2 insertions(+), 2 deletions(-)
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--- a/arch/arm/boot/dts/bcm5301x.dtsi
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+++ b/arch/arm/boot/dts/bcm5301x.dtsi
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@@ -421,7 +421,7 @@
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#address-cells = <1>;
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#size-cells = <1>;
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- lcpll0: clock-controller@100 {
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+ lcpll0: lcpll0@100 {
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#clock-cells = <1>;
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compatible = "brcm,nsp-lcpll0";
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reg = <0x100 0x14>;
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@@ -430,7 +430,7 @@
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"sdio", "ddr_phy";
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};
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- genpll: clock-controller@140 {
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+ genpll: genpll@140 {
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#clock-cells = <1>;
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compatible = "brcm,nsp-genpll";
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reg = <0x140 0x24>;
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