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176 lines
3.2 KiB
Plaintext
176 lines
3.2 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
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#include "rtl838x.dtsi"
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/leds/common.h>
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/ {
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compatible = "tplink,t1600g-28ts-v3", "realtek,rtl838x-soc";
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model = "TP-Link T1600G-28TS v3";
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aliases {
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led-boot = &led_sys;
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led-failsafe = &led_sys;
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led-running = &led_sys;
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led-upgrade = &led_sys;
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label-mac-device = ðernet0;
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};
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chosen {
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stdout-path = "serial0:38400n8";
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};
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leds {
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pinctrl-names = "default";
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compatible = "gpio-leds";
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led_sys: led-0 {
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label = "green:sys";
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gpios = <&gpio0 0 GPIO_ACTIVE_HIGH>;
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color = <LED_COLOR_ID_GREEN>;
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function = LED_FUNCTION_STATUS;
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};
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};
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memory@0 {
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device_type = "memory";
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reg = <0x0 0x10000000>;
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};
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};
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&spi0 {
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status = "okay";
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flash@0 {
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compatible = "jedec,spi-nor";
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reg = <0>;
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spi-max-frequency = <10000000>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "u-boot";
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reg = <0x0 0xe0000>;
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read-only;
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};
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partition@e0000 {
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label = "u-boot-env";
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reg = <0xe0000 0x20000>;
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};
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partition@100000 {
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compatible = "denx,uimage";
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label = "firmware";
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reg = <0x100000 0x1a00000>;
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};
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partition@1b00000 {
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label = "usrappfs";
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reg = <0x1b00000 0x400000>;
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};
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partition@1f00000 {
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label = "para";
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reg = <0x1f00000 0x100000>;
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read-only;
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nvmem-layout {
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compatible = "fixed-layout";
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#address-cells = <1>;
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#size-cells = <1>;
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factory_macaddr: macaddr@fdff4 {
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reg = <0xfdff4 0x6>;
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};
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};
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};
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};
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};
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};
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ðernet0 {
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nvmem-cells = <&factory_macaddr>;
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nvmem-cell-names = "mac-address";
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mdio-bus {
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compatible = "realtek,rtl838x-mdio";
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regmap = <ðernet0>;
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#address-cells = <1>;
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#size-cells = <0>;
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EXTERNAL_PHY(0)
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EXTERNAL_PHY(1)
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EXTERNAL_PHY(2)
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EXTERNAL_PHY(3)
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EXTERNAL_PHY(4)
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EXTERNAL_PHY(5)
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EXTERNAL_PHY(6)
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EXTERNAL_PHY(7)
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INTERNAL_PHY(8)
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INTERNAL_PHY(9)
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INTERNAL_PHY(10)
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INTERNAL_PHY(11)
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INTERNAL_PHY(12)
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INTERNAL_PHY(13)
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INTERNAL_PHY(14)
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INTERNAL_PHY(15)
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EXTERNAL_PHY(16)
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EXTERNAL_PHY(17)
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EXTERNAL_PHY(18)
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EXTERNAL_PHY(19)
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EXTERNAL_PHY(20)
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EXTERNAL_PHY(21)
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EXTERNAL_PHY(22)
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EXTERNAL_PHY(23)
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};
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};
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&switch0 {
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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SWITCH_PORT(0, 1, qsgmii)
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SWITCH_PORT(1, 2, qsgmii)
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SWITCH_PORT(2, 3, qsgmii)
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SWITCH_PORT(3, 4, qsgmii)
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SWITCH_PORT(4, 5, qsgmii)
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SWITCH_PORT(5, 6, qsgmii)
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SWITCH_PORT(6, 7, qsgmii)
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SWITCH_PORT(7, 8, qsgmii)
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SWITCH_PORT(8, 9, internal)
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SWITCH_PORT(9, 10, internal)
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SWITCH_PORT(10, 11, internal)
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SWITCH_PORT(11, 12, internal)
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SWITCH_PORT(12, 13, internal)
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SWITCH_PORT(13, 14, internal)
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SWITCH_PORT(14, 15, internal)
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SWITCH_PORT(15, 16, internal)
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SWITCH_PORT(16, 17, qsgmii)
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SWITCH_PORT(17, 18, qsgmii)
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SWITCH_PORT(18, 19, qsgmii)
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SWITCH_PORT(19, 20, qsgmii)
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SWITCH_PORT(20, 21, qsgmii)
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SWITCH_PORT(21, 22, qsgmii)
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SWITCH_PORT(22, 23, qsgmii)
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SWITCH_PORT(23, 24, qsgmii)
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port@28 {
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ethernet = <ðernet0>;
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reg = <28>;
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phy-mode = "internal";
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fixed-link {
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speed = <1000>;
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full-duplex;
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};
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};
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};
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};
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