mirror of
https://github.com/openwrt/openwrt.git
synced 2024-12-27 17:18:59 +00:00
1f818b09f8
This series of upstream patches properly implement a clock and reset driver for old ralink SoCs[1]. And it includes some related fixes[2] and improvements[3][4]. All patches have been merged into linux-next. They will be part of upcoming Linux 6.5. In order to switch to the new system controller driver, all clocks and resets properties in SoC dtsi have been updated, and kernel symbol "CONFIG_CLK_MTMIPS" have been added to the kernel config files. [1] https://lore.kernel.org/all/20230619040941.1340372-1-sergio.paracuellos@gmail.com [2] https://lore.kernel.org/all/20230622-mips-ralink-clk-wuninitialized-v1-1-ea9041240d10@kernel.org [3] https://lore.kernel.org/all/OSYP286MB03120BABB25900E113ED42B7BC5CA@OSYP286MB0312.JPNP286.PROD.OUTLOOK.COM [4] https://lore.kernel.org/all/TYAP286MB03151148AF8C054621DD55C3BC23A@TYAP286MB0315.JPNP286.PROD.OUTLOOK.COM Tested on Motorola MWR03 (MT7628) Tested on Haier HW-L1W (MT7620) Signed-off-by: Shiji Yang <yangshiji66@qq.com>
122 lines
3.2 KiB
Diff
122 lines
3.2 KiB
Diff
From 201ddc05777cd8e084b508bcdda22214bfe2895e Mon Sep 17 00:00:00 2001
|
|
From: Sergio Paracuellos <sergio.paracuellos@gmail.com>
|
|
Date: Mon, 19 Jun 2023 06:09:39 +0200
|
|
Subject: [PATCH 7/9] mips: ralink: remove reset related code
|
|
|
|
A proper clock driver for ralink SoCs has been added. This driver is also
|
|
a reset provider for the SoC. Hence there is no need to have reset related
|
|
code in 'arch/mips/ralink' folder anymore. The only code that remains is
|
|
the one related with mips_reboot_setup where a PCI reset is performed.
|
|
We maintain this because I cannot test old ralink board with PCI to be
|
|
sure all works if we remove also this code.
|
|
|
|
Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
|
|
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
|
|
---
|
|
arch/mips/ralink/common.h | 2 --
|
|
arch/mips/ralink/of.c | 4 ----
|
|
arch/mips/ralink/reset.c | 61 -----------------------------------------------
|
|
3 files changed, 67 deletions(-)
|
|
|
|
--- a/arch/mips/ralink/common.h
|
|
+++ b/arch/mips/ralink/common.h
|
|
@@ -23,8 +23,6 @@ extern struct ralink_soc_info soc_info;
|
|
|
|
extern void ralink_of_remap(void);
|
|
|
|
-extern void ralink_rst_init(void);
|
|
-
|
|
extern void __init prom_soc_init(struct ralink_soc_info *soc_info);
|
|
|
|
__iomem void *plat_of_remap_node(const char *node);
|
|
--- a/arch/mips/ralink/of.c
|
|
+++ b/arch/mips/ralink/of.c
|
|
@@ -95,10 +95,6 @@ static int __init plat_of_setup(void)
|
|
{
|
|
__dt_register_buses(soc_info.compatible, "palmbus");
|
|
|
|
- /* make sure that the reset controller is setup early */
|
|
- if (ralink_soc != MT762X_SOC_MT7621AT)
|
|
- ralink_rst_init();
|
|
-
|
|
return 0;
|
|
}
|
|
|
|
--- a/arch/mips/ralink/reset.c
|
|
+++ b/arch/mips/ralink/reset.c
|
|
@@ -10,7 +10,6 @@
|
|
#include <linux/io.h>
|
|
#include <linux/of.h>
|
|
#include <linux/delay.h>
|
|
-#include <linux/reset-controller.h>
|
|
|
|
#include <asm/reboot.h>
|
|
|
|
@@ -22,66 +21,6 @@
|
|
#define RSTCTL_RESET_PCI BIT(26)
|
|
#define RSTCTL_RESET_SYSTEM BIT(0)
|
|
|
|
-static int ralink_assert_device(struct reset_controller_dev *rcdev,
|
|
- unsigned long id)
|
|
-{
|
|
- u32 val;
|
|
-
|
|
- if (id == 0)
|
|
- return -1;
|
|
-
|
|
- val = rt_sysc_r32(SYSC_REG_RESET_CTRL);
|
|
- val |= BIT(id);
|
|
- rt_sysc_w32(val, SYSC_REG_RESET_CTRL);
|
|
-
|
|
- return 0;
|
|
-}
|
|
-
|
|
-static int ralink_deassert_device(struct reset_controller_dev *rcdev,
|
|
- unsigned long id)
|
|
-{
|
|
- u32 val;
|
|
-
|
|
- if (id == 0)
|
|
- return -1;
|
|
-
|
|
- val = rt_sysc_r32(SYSC_REG_RESET_CTRL);
|
|
- val &= ~BIT(id);
|
|
- rt_sysc_w32(val, SYSC_REG_RESET_CTRL);
|
|
-
|
|
- return 0;
|
|
-}
|
|
-
|
|
-static int ralink_reset_device(struct reset_controller_dev *rcdev,
|
|
- unsigned long id)
|
|
-{
|
|
- ralink_assert_device(rcdev, id);
|
|
- return ralink_deassert_device(rcdev, id);
|
|
-}
|
|
-
|
|
-static const struct reset_control_ops reset_ops = {
|
|
- .reset = ralink_reset_device,
|
|
- .assert = ralink_assert_device,
|
|
- .deassert = ralink_deassert_device,
|
|
-};
|
|
-
|
|
-static struct reset_controller_dev reset_dev = {
|
|
- .ops = &reset_ops,
|
|
- .owner = THIS_MODULE,
|
|
- .nr_resets = 32,
|
|
- .of_reset_n_cells = 1,
|
|
-};
|
|
-
|
|
-void ralink_rst_init(void)
|
|
-{
|
|
- reset_dev.of_node = of_find_compatible_node(NULL, NULL,
|
|
- "ralink,rt2880-reset");
|
|
- if (!reset_dev.of_node)
|
|
- pr_err("Failed to find reset controller node");
|
|
- else
|
|
- reset_controller_register(&reset_dev);
|
|
-}
|
|
-
|
|
static void ralink_restart(char *command)
|
|
{
|
|
if (IS_ENABLED(CONFIG_PCI)) {
|