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f1c9afd801
Mux the MT7530 switch's phy0/4 to the SoC's gmac1 on devices where RGMII2 pins are available. This achieves 2 Gbps total bandwidth to the CPU using the second RGMII. The ports called "wan" are muxed where possible. On a minority of devices, this is not possible. Those cases: mt7621_ampedwireless_ally-r1900k.dts: lan3 mt7621_ubnt_edgerouter-x.dts: eth0 mt7621_gnubee_gb-pc1.dts: ethblue mt7621_linksys_re6500.dts: lan1 mt7621_netgear_wac104.dts: lan4 mt7621_tplink_eap235-wall-v1.dts: lan0 mt7621_tplink_eap615-wall-v1.dts: lan0 mt7621_ubnt_usw-flex.dts: lan1 The "wan" port is just what the vendor designated on the board/plastic chasis of the device. On a technical level, there is no difference between a lan and wan port on MT7621AT, MT7621DAT and MT7621ST SoCs. Prefer connecting to WAN via the port described above for these devices to benefit the feature brought with this patch. mt7621_d-team_newifi-d2.dts cannot benefit this feature, although it looks like it should, because the rgmii2 pins are wired to unused components. Tested on a range of devices documented on the GitHub PR. Link: https://github.com/openwrt/openwrt/pull/10238 Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
224 lines
3.3 KiB
Plaintext
224 lines
3.3 KiB
Plaintext
#include "mt7621.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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/ {
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compatible = "iodata,wn-ax1167gr", "mediatek,mt7621-soc";
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model = "I-O DATA WN-AX1167GR";
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aliases {
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led-boot = &led_power;
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led-failsafe = &led_power;
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led-running = &led_power;
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led-upgrade = &led_power;
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};
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chosen {
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bootargs = "console=ttyS0,115200";
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};
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leds {
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compatible = "gpio-leds";
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led_power: power {
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label = "green:power";
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gpios = <&gpio 7 GPIO_ACTIVE_LOW>;
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};
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wps {
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label = "green:wps";
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gpios = <&gpio 17 GPIO_ACTIVE_LOW>;
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};
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};
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keys {
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compatible = "gpio-keys";
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reset {
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label = "reset";
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gpios = <&gpio 10 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_RESTART>;
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};
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wps {
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label = "wps";
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gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_WPS_BUTTON>;
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};
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auto {
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label = "auto";
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gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
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linux,code = <BTN_0>;
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linux,input-type = <EV_SW>;
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};
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custom {
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label = "custom";
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gpios = <&gpio 16 GPIO_ACTIVE_LOW>;
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linux,code = <BTN_0>;
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linux,input-type = <EV_SW>;
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};
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};
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};
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&spi0 {
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status = "okay";
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flash@0 {
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compatible = "jedec,spi-nor";
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reg = <0>;
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spi-max-frequency = <10000000>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "Bootloader";
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reg = <0x0 0x30000>;
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read-only;
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};
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partition@30000 {
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label = "Config";
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reg = <0x30000 0x10000>;
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read-only;
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};
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factory: partition@40000 {
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label = "factory";
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reg = <0x40000 0x10000>;
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read-only;
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};
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iNIC_rf: partition@50000 {
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label = "iNIC_rf";
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reg = <0x50000 0x10000>;
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read-only;
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};
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partition@60000 {
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compatible = "denx,uimage";
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label = "firmware";
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reg = <0x60000 0xf30000>;
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};
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partition@f90000 {
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label = "Key";
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reg = <0xf90000 0x10000>;
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read-only;
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};
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partition@fa0000 {
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label = "backup";
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reg = <0xfa0000 0x10000>;
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read-only;
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};
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partition@fb0000 {
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label = "storage";
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reg = <0xfb0000 0x50000>;
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read-only;
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};
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};
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};
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};
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&gmac0 {
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nvmem-cells = <&macaddr_iNIC_rf_4>;
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nvmem-cell-names = "mac-address";
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};
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&gmac1 {
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status = "okay";
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label = "wan";
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phy-handle = <ðphy0>;
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nvmem-cells = <&macaddr_factory_4>;
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nvmem-cell-names = "mac-address";
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mac-address-increment = <1>;
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};
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&mdio {
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ethphy0: ethernet-phy@0 {
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reg = <0>;
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};
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};
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&switch0 {
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ports {
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port@1 {
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status = "okay";
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label = "lan4";
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};
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port@2 {
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status = "okay";
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label = "lan3";
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};
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port@3 {
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status = "okay";
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label = "lan2";
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};
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port@4 {
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status = "okay";
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label = "lan1";
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};
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};
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};
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&state_default {
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gpio {
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groups = "uart2", "uart3", "jtag";
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function = "gpio";
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};
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};
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&pcie {
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status = "okay";
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};
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&pcie0 {
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mt76@0,0 {
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reg = <0x0000 0 0 0 0>;
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mediatek,mtd-eeprom = <&iNIC_rf 0x0>;
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};
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};
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&pcie1 {
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mt76@0,0 {
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reg = <0x0000 0 0 0 0>;
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mediatek,mtd-eeprom = <&factory 0x0>;
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ieee80211-freq-limit = <5000000 6000000>;
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};
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};
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&xhci {
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status = "disabled";
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};
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&iNIC_rf {
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compatible = "nvmem-cells";
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#address-cells = <1>;
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#size-cells = <1>;
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macaddr_iNIC_rf_4: macaddr@4 {
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reg = <0x4 0x6>;
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};
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};
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&factory {
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compatible = "nvmem-cells";
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#address-cells = <1>;
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#size-cells = <1>;
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macaddr_factory_4: macaddr@4 {
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reg = <0x4 0x6>;
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};
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};
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