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117 lines
3.7 KiB
Diff
117 lines
3.7 KiB
Diff
From d677877e2688813e5e0c12d0228a631021ed70c4 Mon Sep 17 00:00:00 2001
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From: Gabor Juhos <juhosg@openwrt.org>
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Date: Wed, 14 Mar 2012 10:45:28 +0100
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Subject: [PATCH 33/47] MIPS: ath79: add WMAC registration code for AR934X
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Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
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Acked-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com>
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Cc: linux-mips@linux-mips.org
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Cc: mcgrof@infradead.org
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Patchwork: https://patchwork.linux-mips.org/patch/3513/
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Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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---
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arch/mips/ath79/Kconfig | 2 +-
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arch/mips/ath79/dev-wmac.c | 30 ++++++++++++++++++++++-
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arch/mips/include/asm/mach-ath79/ar71xx_regs.h | 3 ++
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3 files changed, 32 insertions(+), 3 deletions(-)
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--- a/arch/mips/ath79/Kconfig
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+++ b/arch/mips/ath79/Kconfig
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@@ -86,7 +86,7 @@ config ATH79_DEV_USB
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def_bool n
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config ATH79_DEV_WMAC
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- depends on (SOC_AR913X || SOC_AR933X)
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+ depends on (SOC_AR913X || SOC_AR933X || SOC_AR934X)
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def_bool n
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endif
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--- a/arch/mips/ath79/dev-wmac.c
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+++ b/arch/mips/ath79/dev-wmac.c
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@@ -1,9 +1,12 @@
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/*
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* Atheros AR913X/AR933X SoC built-in WMAC device support
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*
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+ * Copyright (C) 2010-2011 Jaiganesh Narayanan <jnarayanan@atheros.com>
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* Copyright (C) 2008-2011 Gabor Juhos <juhosg@openwrt.org>
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* Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
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*
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+ * Parts of this file are based on Atheros 2.6.15/2.6.31 BSP
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+ *
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published
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* by the Free Software Foundation.
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@@ -26,8 +29,7 @@ static struct resource ath79_wmac_resour
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/* .start and .end fields are filled dynamically */
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.flags = IORESOURCE_MEM,
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}, {
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- .start = ATH79_CPU_IRQ_IP2,
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- .end = ATH79_CPU_IRQ_IP2,
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+ /* .start and .end fields are filled dynamically */
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.flags = IORESOURCE_IRQ,
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},
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};
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@@ -53,6 +55,8 @@ static void __init ar913x_wmac_setup(voi
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ath79_wmac_resources[0].start = AR913X_WMAC_BASE;
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ath79_wmac_resources[0].end = AR913X_WMAC_BASE + AR913X_WMAC_SIZE - 1;
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+ ath79_wmac_resources[1].start = ATH79_CPU_IRQ_IP2;
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+ ath79_wmac_resources[1].end = ATH79_CPU_IRQ_IP2;
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}
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@@ -79,6 +83,8 @@ static void __init ar933x_wmac_setup(voi
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ath79_wmac_resources[0].start = AR933X_WMAC_BASE;
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ath79_wmac_resources[0].end = AR933X_WMAC_BASE + AR933X_WMAC_SIZE - 1;
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+ ath79_wmac_resources[1].start = ATH79_CPU_IRQ_IP2;
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+ ath79_wmac_resources[1].end = ATH79_CPU_IRQ_IP2;
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t = ath79_reset_rr(AR933X_RESET_REG_BOOTSTRAP);
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if (t & AR933X_BOOTSTRAP_REF_CLK_40)
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@@ -92,12 +98,32 @@ static void __init ar933x_wmac_setup(voi
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ath79_wmac_data.external_reset = ar933x_wmac_reset;
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}
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+static void ar934x_wmac_setup(void)
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+{
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+ u32 t;
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+
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+ ath79_wmac_device.name = "ar934x_wmac";
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+
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+ ath79_wmac_resources[0].start = AR934X_WMAC_BASE;
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+ ath79_wmac_resources[0].end = AR934X_WMAC_BASE + AR934X_WMAC_SIZE - 1;
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+ ath79_wmac_resources[1].start = ATH79_IP2_IRQ(1);
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+ ath79_wmac_resources[1].start = ATH79_IP2_IRQ(1);
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+
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+ t = ath79_reset_rr(AR934X_RESET_REG_BOOTSTRAP);
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+ if (t & AR934X_BOOTSTRAP_REF_CLK_40)
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+ ath79_wmac_data.is_clk_25mhz = false;
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+ else
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+ ath79_wmac_data.is_clk_25mhz = true;
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+}
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+
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void __init ath79_register_wmac(u8 *cal_data)
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{
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if (soc_is_ar913x())
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ar913x_wmac_setup();
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else if (soc_is_ar933x())
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ar933x_wmac_setup();
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+ else if (soc_is_ar934x())
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+ ar934x_wmac_setup();
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else
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BUG();
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--- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
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+++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
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@@ -61,6 +61,9 @@
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#define AR933X_EHCI_BASE 0x1b000000
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#define AR933X_EHCI_SIZE 0x1000
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+#define AR934X_WMAC_BASE (AR71XX_APB_BASE + 0x00100000)
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+#define AR934X_WMAC_SIZE 0x20000
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+
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/*
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* DDR_CTRL block
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*/
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