mirror of
https://github.com/openwrt/openwrt.git
synced 2024-12-29 10:08:59 +00:00
62b7f5931c
bcm2708: boot tested on RPi B+ v1.2
bcm2709: boot tested on RPi 3B v1.2 and RPi 4B v1.1 4G
bcm2710: boot tested on RPi 3B v1.2
bcm2711: boot tested on RPi 4B v1.1 4G
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
(cherry-picked from commit f07e572f64)
104 lines
3.5 KiB
Diff
104 lines
3.5 KiB
Diff
From a9fd19f2fc9c3f067ea32e53f84c9e83b8f910c5 Mon Sep 17 00:00:00 2001
|
|
From: Dave Stevenson <dave.stevenson@raspberrypi.org>
|
|
Date: Wed, 31 Oct 2018 14:59:06 +0000
|
|
Subject: [PATCH] dt-bindings: Document BCM283x CSI2/CCP2 receiver
|
|
|
|
Document the DT bindings for the CSI2/CCP2 receiver peripheral
|
|
(known as Unicam) on BCM283x SoCs.
|
|
|
|
Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.org>
|
|
Acked-by: Rob Herring <robh@kernel.org>
|
|
---
|
|
.../bindings/media/bcm2835-unicam.txt | 85 +++++++++++++++++++
|
|
1 file changed, 85 insertions(+)
|
|
create mode 100644 Documentation/devicetree/bindings/media/bcm2835-unicam.txt
|
|
|
|
--- /dev/null
|
|
+++ b/Documentation/devicetree/bindings/media/bcm2835-unicam.txt
|
|
@@ -0,0 +1,85 @@
|
|
+Broadcom BCM283x Camera Interface (Unicam)
|
|
+------------------------------------------
|
|
+
|
|
+The Unicam block on BCM283x SoCs is the receiver for either
|
|
+CSI-2 or CCP2 data from image sensors or similar devices.
|
|
+
|
|
+The main platform using this SoC is the Raspberry Pi family of boards.
|
|
+On the Pi the VideoCore firmware can also control this hardware block,
|
|
+and driving it from two different processors will cause issues.
|
|
+To avoid this, the firmware checks the device tree configuration
|
|
+during boot. If it finds device tree nodes called csi0 or csi1 then
|
|
+it will stop the firmware accessing the block, and it can then
|
|
+safely be used via the device tree binding.
|
|
+
|
|
+Required properties:
|
|
+===================
|
|
+- compatible : must be "brcm,bcm2835-unicam".
|
|
+- reg : physical base address and length of the register sets for the
|
|
+ device.
|
|
+- interrupts : should contain the IRQ line for this Unicam instance.
|
|
+- clocks : list of clock specifiers, corresponding to entries in
|
|
+ clock-names property.
|
|
+- clock-names : must contain an "lp" entry, matching entries in the
|
|
+ clocks property.
|
|
+
|
|
+Unicam supports a single port node. It should contain one 'port' child node
|
|
+with child 'endpoint' node. Please refer to the bindings defined in
|
|
+Documentation/devicetree/bindings/media/video-interfaces.txt.
|
|
+
|
|
+Within the endpoint node the "remote-endpoint" and "data-lanes" properties
|
|
+are mandatory.
|
|
+Data lane reordering is not supported so the data lanes must be in order,
|
|
+starting at 1. The number of data lanes should represent the number of
|
|
+usable lanes for the hardware block. That may be limited by either the SoC or
|
|
+how the platform presents the interface, and the lower value must be used.
|
|
+
|
|
+Lane reordering is not supported on the clock lane either, so the optional
|
|
+property "clock-lane" will implicitly be <0>.
|
|
+Similarly lane inversion is not supported, therefore "lane-polarities" will
|
|
+implicitly be <0 0 0 0 0>.
|
|
+Neither of these values will be checked.
|
|
+
|
|
+Example:
|
|
+ csi1: csi1@7e801000 {
|
|
+ compatible = "brcm,bcm2835-unicam";
|
|
+ reg = <0x7e801000 0x800>,
|
|
+ <0x7e802004 0x4>;
|
|
+ interrupts = <2 7>;
|
|
+ clocks = <&clocks BCM2835_CLOCK_CAM1>;
|
|
+ clock-names = "lp";
|
|
+
|
|
+ port {
|
|
+ csi1_ep: endpoint {
|
|
+ remote-endpoint = <&tc358743_0>;
|
|
+ data-lanes = <1 2>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ i2c0: i2c@7e205000 {
|
|
+ tc358743: csi-hdmi-bridge@0f {
|
|
+ compatible = "toshiba,tc358743";
|
|
+ reg = <0x0f>;
|
|
+
|
|
+ clocks = <&tc358743_clk>;
|
|
+ clock-names = "refclk";
|
|
+
|
|
+ tc358743_clk: bridge-clk {
|
|
+ compatible = "fixed-clock";
|
|
+ #clock-cells = <0>;
|
|
+ clock-frequency = <27000000>;
|
|
+ };
|
|
+
|
|
+ port {
|
|
+ tc358743_0: endpoint {
|
|
+ remote-endpoint = <&csi1_ep>;
|
|
+ clock-lanes = <0>;
|
|
+ data-lanes = <1 2>;
|
|
+ clock-noncontinuous;
|
|
+ link-frequencies =
|
|
+ /bits/ 64 <297000000>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+ };
|