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99545b4bb1
This target adds support for the Allwinner D1 RISC-V based SoCs.
- RISC-V single-core T-Head C906 (RV64GCV)
- Tensilica HiFi4 DSP
- DDR2/DDR3 support
- 10/100/1000M ethernet
- usual peripherals like USB2, SPI, I2C, PWM, etc.
Four boards are supported:
- Dongshan Nezha STU
- 512Mb RAM
- ethernet
- LicheePi RV Dock
- 512Mb RAM
- wireless-only (RTL8723DS)
- MangoPi MQ-Pro
- 512Mb RAM
- there are pads available for an SPI flash
- wireless-only (RTL8723DS)
- Nezha D1
- 512Mb/1Gb/2Gb RAM
- 256Mb NAND flash
- ethernet, wireless
Installation:
Standard SD-card installation via dd-ing the generated image to
an SD-card of at least 256Mb.
Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu>
32 lines
970 B
Diff
32 lines
970 B
Diff
From 5dae72bf0e0fabb3164dbc4b5eee310c63f1975c Mon Sep 17 00:00:00 2001
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From: Samuel Holland <samuel@sholland.org>
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Date: Thu, 11 Aug 2022 22:20:31 -0500
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Subject: [PATCH 039/117] riscv: dts: allwinner: d1: Add crypto engine support
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Signed-off-by: Samuel Holland <samuel@sholland.org>
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---
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arch/riscv/boot/dts/allwinner/sun20i-d1.dtsi | 12 ++++++++++++
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1 file changed, 12 insertions(+)
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--- a/arch/riscv/boot/dts/allwinner/sun20i-d1.dtsi
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+++ b/arch/riscv/boot/dts/allwinner/sun20i-d1.dtsi
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@@ -457,6 +457,18 @@
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};
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};
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+ crypto: crypto@3040000 {
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+ compatible = "allwinner,sun20i-d1-crypto";
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+ reg = <0x3040000 0x800>;
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+ interrupts = <68 IRQ_TYPE_LEVEL_HIGH>;
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+ clocks = <&ccu CLK_BUS_CE>,
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+ <&ccu CLK_CE>,
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+ <&ccu CLK_MBUS_CE>,
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+ <&rtc CLK_IOSC>;
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+ clock-names = "bus", "mod", "ram", "trng";
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+ resets = <&ccu RST_BUS_CE>;
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+ };
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+
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mbus: dram-controller@3102000 {
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compatible = "allwinner,sun20i-d1-mbus";
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reg = <0x3102000 0x1000>,
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