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20ea6adbf1
Build system: x86_64 Build-tested: bcm2708, bcm2709, bcm2710, bcm2711 Run-tested: bcm2708/RPiB+, bcm2709/RPi3B, bcm2710/RPi3B, bcm2711/RPi4B Signed-off-by: Marty Jones <mj8263788@gmail.com> Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
85 lines
2.8 KiB
Diff
85 lines
2.8 KiB
Diff
From 4ec4cfbf63a697a5b1c82b400d28afd0347d555a Mon Sep 17 00:00:00 2001
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From: Maxime Ripard <maxime@cerno.tech>
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Date: Fri, 8 Apr 2022 10:06:11 +0200
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Subject: [PATCH] clk: Take into account uncached clocks in
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clk_set_rate_range()
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clk_set_rate_range() will use the last requested rate for the clock when
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it calls into the driver set_rate hook.
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However, if CLK_GET_RATE_NOCACHE is set on that clock, the last
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requested rate might not be matching the current rate of the clock. In
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such a case, let's read out the rate from the hardware and use that in
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our set_rate instead.
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Tested-by: Alexander Stein <alexander.stein@ew.tq-group.com> # imx8mp
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Tested-by: Marek Szyprowski <m.szyprowski@samsung.com> # exynos4210, meson g12b
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Signed-off-by: Maxime Ripard <maxime@cerno.tech>
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---
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drivers/clk/clk.c | 6 +++++-
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drivers/clk/clk_test.c | 28 ++++++++++++++++++++++++++++
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2 files changed, 33 insertions(+), 1 deletion(-)
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--- a/drivers/clk/clk.c
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+++ b/drivers/clk/clk.c
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@@ -2366,6 +2366,10 @@ static int clk_set_rate_range_nolock(str
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goto out;
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}
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+ rate = clk->core->req_rate;
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+ if (clk->core->flags & CLK_GET_RATE_NOCACHE)
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+ rate = clk_core_get_rate_recalc(clk->core);
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+
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/*
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* Since the boundaries have been changed, let's give the
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* opportunity to the provider to adjust the clock rate based on
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@@ -2383,7 +2387,7 @@ static int clk_set_rate_range_nolock(str
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* - the determine_rate() callback does not really check for
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* this corner case when determining the rate
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*/
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- rate = clamp(clk->core->req_rate, min, max);
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+ rate = clamp(rate, min, max);
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ret = clk_core_set_rate_nolock(clk->core, rate);
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if (ret) {
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/* rollback the changes */
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--- a/drivers/clk/clk_test.c
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+++ b/drivers/clk/clk_test.c
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@@ -362,9 +362,37 @@ static void clk_test_uncached_set_range(
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KUNIT_EXPECT_LE(test, rate, DUMMY_CLOCK_RATE_2);
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}
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+/*
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+ * Test that for an uncached clock, clk_set_rate_range() will work
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+ * properly if the rate has changed in hardware.
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+ *
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+ * In this case, it means that if the rate wasn't initially in the range
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+ * we're trying to set, but got changed at some point into the range
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+ * without the kernel knowing about it, its rate shouldn't be affected.
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+ */
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+static void clk_test_uncached_updated_rate_set_range(struct kunit *test)
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+{
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+ struct clk_dummy_context *ctx = test->priv;
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+ struct clk_hw *hw = &ctx->hw;
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+ struct clk *clk = hw->clk;
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+ unsigned long rate;
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+
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+ ctx->rate = DUMMY_CLOCK_RATE_1 + 1000;
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+ KUNIT_ASSERT_EQ(test,
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+ clk_set_rate_range(clk,
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+ DUMMY_CLOCK_RATE_1,
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+ DUMMY_CLOCK_RATE_2),
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+ 0);
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+
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+ rate = clk_get_rate(clk);
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+ KUNIT_ASSERT_GT(test, rate, 0);
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+ KUNIT_EXPECT_EQ(test, rate, DUMMY_CLOCK_RATE_1 + 1000);
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+}
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+
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static struct kunit_case clk_uncached_test_cases[] = {
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KUNIT_CASE(clk_test_uncached_get_rate),
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KUNIT_CASE(clk_test_uncached_set_range),
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+ KUNIT_CASE(clk_test_uncached_updated_rate_set_range),
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{}
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};
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